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PDF 74ABT843D Data sheet ( Hoja de datos )
| Número de pieza | 74ABT843D | |
| Descripción | 9-bit interface latch with set and reset 3-State | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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INTEGRATED CIRCUITS
74ABT843
9-bit interface latch with set and reset
(3-State)
Product specification
Supersedes data of 1995 Sep 06
IC23 Data Handbook
1998 Jan 16
Philips
Semiconductors
1 page  
Philips Semiconductors
9-bit bus interface latch with set and reset
(3-State)
Product specification
74ABT843
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
VCC
VI
VIH
VIL
IOH
IOL
∆t/∆v
Tamb
DC supply voltage
Input voltage
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Input transition rise or fall rate
Operating free-air temperature range
LIMITS
Min Max
4.5 5.5
0 VCC
2.0
0.8
–32
64
0 10
–40 +85
UNIT
V
V
V
V
mA
mA
ns/V
°C
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Tamb = +25°C
Tamb = –40°C
to +85°C
UNIT
Min Typ Max Min Max
VIK Input clamp voltage
VOH High–level output voltage
VOL
VRST
Low–level output voltage
Power–up output low
voltage3
VCC = 4.5V; IIK = –18mA
VCC = 4.5V; IOH = –3mA; VI = VIL or VIH
VCC = 5.0V; IOH = –3mA; VI = VIL or VIH
VCC = 4.5V; IOH = –32mA; VI = VIL or VIH
VCC = 4.5V; IOL = 64mA; VI = VIL or VIH
VCC = 5.5V; IO = 1mA; VI = VCC or GND
–0.9 –1.2
–1.2
2.5 2.9
2.5
3.0 3.4
3.0
2.0 2.4
2.0
0.42 0.55
0.55
0.13 0.55
0.55
V
V
V
V
V
V
II
IOFF
IPU/IPD
IOZH
Input leakage current
Power-off leakage current
Power-up/down 3–state
output current4
3-State output High current
VCC = 5.5V; VI = GND or 5.5V
VCC = 0.0V; VO or VI ≤ 4.5V
VCC = 2.0V; VO = 0.5V; V OE = VCC; VI =
GND or VCC
VCC = 5.5V; VO = 2.7V; VI = VIL or VIH
±0.01 ±1.0
±5.0 ±100
±5.0 ±50
5.0 50
±1.0
±100
±50
50
µA
µA
µA
µA
IOZL 3-State output Low current VCC = 5.5V; VO = 0.5V; VI = VIL or VIH
–5.0 –50
–50 µA
ICEX
IO
Output high leakage current
Output current1
VCC = 5.5V; VO = 5.5V; VI = GND or VCC
VCC = 5.5V; VO = 2.5V
5.0 50
50 µA
–50 –80 –180 –50 –180 mA
ICCH
VCC = 5.5V; Outputs High, VI = GND or VCC
0.5 250
250 µA
ICCL Quiescent supply current
VCC = 5.5V; Outputs Low, VI = GND or VCC
25 34
34 mA
ICCZ
VCC = 5.5V; Outputs 3-State;
VI = GND or VCC
0.5 250
250 µA
∆ICC
Additional supply current per VCC = 5.5V; one input at 3.4V,
input pin2
other inputs at VCC or GND
0.5 1.5
1.5 mA
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. For valid test results, data must not be loaded into the flip–flops (or latches) after applying the power.
4. This parameter is valid for any VCC between 0V and 2.1V with a transition time of up to 10msec. For VCC = 2.1V to VCC = 5V " 10%, a
transition time of up to 100µsec is permitted.
1998 Jan 16
5
5 Page 
Philips Semiconductors
9-bit bus interface latch with set and reset
(3-State)
SSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm
Product specification
74ABT843
SOT340-1
1998 Jan 16
11
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet 74ABT843D.PDF ] | |
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