74HC3G06 반도체 회로 부품 판매점
Inverter
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 Philips |
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INTEGRATED CIRCUITS
DATA SHEET
74HC3G06; 74HCT3G06
Inverter with open-drain outputs
Product specification
Supersedes data of 2003 May 15
2003 Dec 02
www.DataSheet4U.com
Philips Semiconductors
Inverter with open-drain outputs
Product specification
74HC3G06; 74HCT3G06
FEATURES
• Wide supply voltage range from 2.0 to 6.0 V
• High noise immunity
• Low power dissipation
• SOT505-2 and SOT765-1 package
• ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.
• Specified from −40 to +85 °C and −40 to +125 °C.
DESCRIPTION
The 74HC3G06/74HCT3G06 is a high-speed Si-gate
CMOS device. Specified in compliance with JEDEC
standard no. 7A.
The 74HC3G06/74HCT3G06 provides three inverting
buffers.
The outputs of the 74HC3G06; 74HCT3G06 devices are
open drains and can be connected to other open-drain
outputs to implement active-LOW wired-OR or
active-HIGH wired-AND functions. For digital operation
this device must have a pull-up resistor to establish a logic
HIGH-level.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf ≤ 6.0 ns.
SYMBOL
PARAMETER
CONDITIONS
tPZL propagation delay nA to nY
CL = 50 pF; VCC = 4.5 V
tPLZ propagation delay nA to nY
CL = 50 pF; VCC = 4.5 V
CI input capacitance
CPD power dissipation capacitance per buffer notes 1 and 2
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts;
N = total load switching outputs;
Σ(CL × VCC2 × fo) = sum of the outputs.
2. For 74HC3G06 the condition is VI = GND to VCC.
For 74HCT3G06 the condition is VI = GND to VCC − 1.5 V.
TYPICAL
HC3G
9
11
1.5
4
HCT3G
9
12
1.5
4
UNIT
ns
ns
pF
pF
2003 Dec 02
2
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74HC3G06 inverter
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[ 74HC3G06.PDF ]
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국내 전력반도체 판매점
상호 : 아이지 인터내셔날
전화번호 : 051-319-2877
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