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Número de pieza | FOD8316 | |
Descripción | IGBT Drive Optocoupler | |
Fabricantes | Fairchild Semiconductor | |
Logotipo | ||
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FOD8316
2.5A Output Current, IGBT Drive Optocoupler with
Desaturation Detection and Isolated Fault Sensing
Features
■ High Noise Immunity characterized by common mode
rejection
– 35kV/µs Minimum Common Mode Rejection
(Vcm = 1500Vpk)
■ 2.5A peak output current driving capability for most
1200V/150A IGBT
■ Optically isolated fault sensing feedback
■ “Soft” IGBT turn-off
■ Built-in IGBT protection
– Desaturation detection
– Under voltage lockout protection
■ 1,414V (peak) working voltage rating
■ 8,000V (peak) transient isolation voltage rating
■ Wide supply voltage range from 15V to 30V
– Use of P-Channel MOSFETs at output stage
enables output voltage swing close to the supply
rail (rail-to-rail output)
■ 3.3V/5V, CMOS/TTL compatible inputs
■ High Speed
– 500ns max. propagation delay over full operating
temperature range
■ Extended industrial temperate range, -40°C to 100°C
temperature range
■ Safety and regulatory
– UL1577, 4,243 VRMS for 1 min.
– DIN EN/IEC 60747-5-5
■ RDS(ON) of 1Ω (typ.) offers lower power dissipation
■ User configurable: inverting, non-inverting, auto-reset,
auto-shutdown
■ 8mm creepage and clearance distances
Applications
■ Industrial inverter
■ Induction heating
■ Isolated IGBT drive
Description
The FOD8316 is an advanced 2.5A Output Current
IGBT Drive Optocoupler, capable of driving most 1200V/
150A IGBTs. It is ideally suited for fast switching driving
of power IGBTs and MOSFETs used in motor control
inverter applications and high performance power
systems. It offers critical protection features necessary
for preventing fault conditions that lead to destructive
thermal runaway of IGBTs.
It utilizes Fairchild’s patented coplanar packaging
technology, Optoplanar®, and optimized IC design to
achieve high noise immunity, characterized by high
common mode rejection and power supply rejection
specifications.
It consists of an integrated gate drive optocoupler featur-
ing low RDS(ON) CMOS transistors to drive the IGBT from
rail to rail and an integrated high speed isolated feed-
backwww.DataSheet.net/ for fault sensing. The device is housed in a com-
pact 16-pin small outline plastic package which meets
the 8mm creepage and clearance requirements.
©2010 Fairchild Semiconductor Corporation
FOD8316 Rev. 1.2.0
www.fairchildsemi.com
Datasheet pdf - http://www.DataSheet4U.co.kr/
1 page Absolute Maximum Ratings (TA = 25ºC unless otherwise specified)
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Parameter
Value
Units
TSTG
TOPR
TJ
TSOL
IFAULT
IO(PEAK)
VE – VSS
VDD2 – VE
VO(peak)
VDD2 – VSS
VDD1
VIN+, VIN- and VRESET
VFAULT
VS
VDESAT
PDI
PDO
Storage Temperature
Operating Temperature
Junction Temperature
Lead Wave Solder Temperature
(no solder immersion)
Refer to page 27 for reflow temperature profile.
Fault Output Current
Peak Output Current(1)
Negative Output Supply Voltage(2)
Positive Output Supply Voltage
Gate Drive Output Voltage
Output Supply Voltage
Positive Input Supply Voltage
Input Voltages
Fault Pin Voltage
Source of Pull-up PMOS Transistor Voltage
DESAT Voltage
Input Power Dissipation(3)(5)
Output Power Dissipation(4)(5)
www.DataSheet.net/
-40 to +125
-40 to +100
-40 to +125
260 for 10 sec
15
3
0 to 15
-0.5 to 35 – (VE – VSS)
-0.5 to 35
-0.5 to 35
-0.5 to 6
-0.5 to VDD1
-0.5 to VDD1
VSS + 6.5 to VDD2
VE to VE + 11
100
600
ºC
ºC
ºC
ºC
mA
A
V
V
V
V
V
V
V
V
V
mW
mW
Notes:
1. Maximum pulse width = 10µs, maximum duty cycle = 0.2%.
2. This negative output supply voltage is optional. It’s only needed when negative gate drive is implemented. Refer to
“Dual Supply Operation – Negative Bias at Vss” on page 23.
3. No derating required across temperature range.
4. Derate linearly above 64°C, free air temperature at a rate of 10.2mW/°C
5. Functional operation under these conditions is not implied. Permanent damage may occur if the device is subjected
to conditions outside these ratings.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
Parameter
Min.
Max.
Unit
TA
VDD1
VDD2 – VSS
VE – VSS
VDD2 – VE
VS
Ambient Operating Temperature
Input Supply Voltage(6)
Total Output Supply Voltage
Negative Output Supply Voltage
Positive Output Supply Voltage(6)
Source of Pull-up PMOS Transistor Voltage
-40
3
15
0
15
VSS + 7.5
+100
5.5
30
15
30 – (VE – VSS)
VDD2
ºC
V
V
V
V
V
Note:
6. During power up or down, it is important to ensure that VIN+ remains low until both the input and output supply
voltages reaches the proper recommended operating voltages to avoid any momentary instability at the output state.
See also the discussion in the “Time to Good Power” section on page 23.
©2010 Fairchild Semiconductor Corporation
FOD8316 Rev. 1.2.0
5
www.fairchildsemi.com
Datasheet pdf - http://www.DataSheet4U.co.kr/
5 Page Typical Performance Characteristics (Continued)
Figure 13. Supply Current (IE) vs. Temperature
-0.10
-0.15
-0.20
-0.25
IEL
IEH
Figure 14. Source Current (IS) vs. Output Current (IO)
3.0
-40°C
25°C
2.5 100°C
2.0
1.5
-0.30
1.0
-0.35 VDD2 – VSS = 30V
VDD1 = 5V
VIN+ = 5V (IEH) / 0V (IEL)
-0.40
-40 -20 0 20 40 60
TA – TEMPERATURE (°C)
80 100
0.5 VDD2 – VSS = 30V
VDD1 = 5V
VIN+ = 5V
0
0 0.5
1.0
1.5
IO – OUTPUT CURRENT (mA)
2.0
Figure 15. Under Voltage Lockout Threshold (VUVLO)
vs. Temperature
15
Figure 16. DESAT Threshold (VDESAT) vs. Temperature
8.0
V UVLO+
10
V UVLO–
5
VDD1 = 5V
VIN+ = 5V
0
-40 -20
0 20 40 60
TA – TEMPERATURE (°C)
80 100
Figure 17. Propagation Delay (tP) vs. Temperature
0.5
0.4
tPLH
0.3
tPHL
0.2
VDD2 – VSS = 30V
VDD1 = 5V
f = 10kHz 50% Duty Cycle
RL = 10Ω, CL = 10nF
0.1
-40 -20 0 20 40 60
TA – TEMPERATURE (°C)
80 100
7.5
7.0
www.DataSheet.net/
6.5
VDD2 – VSS = 30V
VDD1 = 5V
VIN+ = 5V
6.0
-40
-20
0
20 40 60
TA – TEMPERATURE (°C)
80
Figure 18. Propagation Delay (tP) vs.
Supply Voltage (VDD2)
0.45
0.40
0.35
0.30
0.25
tPLH
tPHL
0.20
0.15 VDD1 = 5V
f = 10kHz 50% Duty Cycle
RL = 10Ω, CL = 10nF
0.10
15 20
25
VDD2 – SUPPLY VOLTAGE (V)
100
30
©2010 Fairchild Semiconductor Corporation
FOD8316 Rev. 1.2.0
11
www.fairchildsemi.com
Datasheet pdf - http://www.DataSheet4U.co.kr/
11 Page |
Páginas | Total 29 Páginas | |
PDF Descargar | [ Datasheet FOD8316.PDF ] |
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