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PDF 74AUP1T97 Data sheet ( Hoja de datos )
| Número de pieza | 74AUP1T97 | |
| Descripción | Low Power Configurable Gate | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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October 2010
74AUP1T97
TinyLogic® Low Power Configurable Gate with
Voltage-Level Translator
Features
Single Supply Voltage Translator
- 1.8V to 3.3V Input at VCC=3.3V
- 1.8V to 2.5V Input at VCC=2.5V
2.3V to 3.6V VCC Supply Voltage Operation
3.6V Over-Voltage Tolerant I/O’s at VCC from
2.3V to 3.6V
Power-Off High-Impedance Inputs and Outputs
Low Static Power Consumption
- ICC=0.9µA Maximum
Low Dynamic Power Consumption
- CPD=2.7pF Typical at 3.3V
Ultra-Small MicroPak™ Packages
Description
The 74AUP1T97 is a universal configurable 2-input
logic gate that provides single supply voltage level
translation. This device is designed for applications with
inputs switching levels that accept 1.8V low voltage
CMOS signals while operating from either a single 2.5V
or 3.3V supply voltage. The 74AUP1T97 is an ideal low
power solution for mixed voltage signal applications
especially for battery-powered portable applications.
This product guarantees very low static and dynamic
power consumption across entire voltage range. All
inputs are implemented with hysteresis to allow for
slower transition input signals and better switching
noise immunity.
The 74AUP1T97 provides for multiple functions as
determined by various configurations of the three
inputs. The potential logic functions provided are MUX,
AND, NAND, OR, and NOR, inverter and buffer. Refer
to Figures 3 to 9.
Ordering Information
Part Number Top Mark
Package
74AUP1T97L6X
AH 6-Lead MicroPak™, 1.0mm Wide
74AUP1T97FHX
AH 6-Lead, MicroPak2™, 1x1mm Body, .35mm Pitch
Packing Method
5000 Units on
Tape & Reel
5000 Units on
Tape & Reel
© 2008 Fairchild Semiconductor Corporation
74AUP1T97 • Rev. 1.0.3
www.fairchildsemi.com
1 page  
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device
reliability. The absolute maximum ratings are stress ratings only.
Symbol
Parameter
VCC
VIN
VOUT
IIK
IOK
IOH / IOL
IO
ICC or IGND
TSTG
TJ
TL
PD
Supply Voltage
DC Input Voltage
DC Output Voltage
HIGH or LOW State(3)
VCC=0V
DC Input Diode Current
VIN < 0V
DC Output Diode Current
VOUT < 0V
VOUT > VCC
DC Output Source / Sink Current
Continuous Output Current
DC VCC or Ground Current per Supply Pin
Storage Temperature Range
Junction Temperature Under Bias
Junction Lead Temperature, Soldering 10s
Power Dissipation at +85°C
MicroPak-6
MicroPak2-6
ESD
Human Body Model, JEDEC:JESD22-A114
Charged Device Model, JEDEC:JESD22-C101
Note:
3. IO absolute maximum rating must be observed.
Min.
-0.5
-0.5
-0.5
-0.5
-65
Max.
4.6
4.6
VCC + 0.5
4.6
-50
-50
+50
±50
±20
±50
+150
+150
+260
130
120
5000+
2000
Unit
V
V
V
mA
mA
mA
mA
mA
°C
°C
°C
mW
V
Recommended Operating Conditions(4)
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
Parameter
Conditions
VCC
VIN
VOUT
Supply Voltage
Input Voltage
Output Voltage
VCC=0V
HIGH or LOW State
IOH/IOL Output Current
VCC=3.0V to 3.6V
VCC=2.3V to 2.7V
TA Operating Temperature, Free Air
θJA Thermal Resistance
MicroPak-6
MicroPak2-6
Note:
4. Unused inputs must be held HIGH or LOW. They may not float.
Min.
2.3
0
0
0
-40
Max.
3.6
3.6
3.6
VCC
±4.0
±3.1
+85
500
560
Unit
V
V
V
mA
°C
°C/W
© 2008 Fairchild Semiconductor Corporation
74AUP1T97 • 1.0.3
5
www.fairchildsemi.com
5 Page 
© 2008 Fairchild Semiconductor Corporation
74AUP1T97 • 1.0.3
11
www.fairchildsemi.com
11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet 74AUP1T97.PDF ] | |
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