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74HC27D 반도체 회로 부품 판매점

Triple 3-input NOR gate



NXP Semiconductors 로고
NXP Semiconductors
74HC27D 데이터시트, 핀배열, 회로
74HC27; 74HCT27
Triple 3-input NOR gate
Rev. 4 — 5 June 2013
Product data sheet
1. General description
The 74HC27; 74HCT27 is a triple 3-input NOR gate. Inputs include clamp diodes. This
enables the use of current limiting resistors to interface inputs to voltages in excess of
VCC.
2. Features and benefits
Complies with JEDEC standard no. 7A
Input levels:
For 74HC27: CMOS level
For 74HCT27: TTL level
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from 40 C to +85 C and from 40 C to +125 C
3. Ordering information
Table 1. Ordering information
Type number Package
Temperature range Name
Description
Version
74HC27N
40 C to +125 C DIP14
plastic dual in-line package; 14 leads (300 mil)
SOT27-1
74HCT27N
74HC27D
40 C to +125 C SO14
plastic small outline package; 14 leads; body width 3.9 mm SOT108-1
74HCT27D
74HC27DB 40 C to +125 C SSOP14
74HCT27DB
plastic shrink small outline package; 14 leads; body width SOT337-1
5.3 mm
74HC27PW 40 C to +125 C TSSOP14 plastic thin shrink small outline package; 14 leads; body
74HCT27PW
width 4.4 mm
SOT402-1
74HC27BQ 40 C to +125 C
74HCT27BQ
DHVQFN14 plastic dual in-line compatible thermal enhanced very thin
quad flat package; no leads; 14 terminals;
body 2.5 3 0.85 mm
SOT762-1


74HC27D 데이터시트, 핀배열, 회로
NXP Semiconductors
4. Functional diagram
74HC27; 74HCT27
Triple 3-input NOR gate
1 1A
2 1B
13 1C
3 2A
4 2B
5 2C
9 3A
10 3B
11 3C
1Y 12
2Y 6
3Y 8
mna936
Fig 1. Logic symbol
1
1
2 12
13
3
1
4
5
6
9 1
10
11
8
mna935
Fig 2. IEC logic symbol
5. Pinning information
5.1 Pinning
A
BY
C
mna937
Fig 3. Logic diagram (one gate)
1A 1
1B 2
2A 3
2B 4
2C 5
2Y 6
GND 7
74HC27
74HCT27
14 VCC
13 1C
12 1Y
11 3C
10 3B
9 3A
8 3Y
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Fig 4. Pin configuration DIP14, SO14, (T)SSOP14
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DDD
7UDQVSDUHQWWRSYLHZ
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Fig 5. Pin configuration DHVQFN14
74HC_HCT27
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 5 June 2013
© NXP B.V. 2013. All rights reserved.
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