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PDF FOD8001 Data sheet ( Hoja de datos )

Número de pieza FOD8001
Descripción 3.3V Logic Gate Optocoupler
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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No Preview Available ! FOD8001 Hoja de datos, Descripción, Manual

March 2009
FOD8001
www.datasheet4u.com
High Noise Immunity, 3.3V/5V Logic Gate Optocoupler
Features
High Noise Immunity characterized by Common Mode
Rejection (CMR) and Power Supply Rejection (PSR)
specifications
– 20kV/µs Minimum Static CMR @ Vcm = 1000V
– 25kV/µs Typical Dynamic CMR @ Vcm = 1500V,
20MBaud Rate
– PSR in excess of 10% of the supply voltages
across full operating bandwidth
High Speed:
– 25Mbit/sec Date Rate (NRZ)
– 40ns max. Propagation Delay
– 6ns max. Pulse Width Distortion
– 20ns max. Propagation Delay Skew
3.3V and 5V CMOS Compatibility
Extended industrial temperate range, -40°C to 105°C
temperature range
Safety and regulatory pending approvals:
– UL1577, 3750 VACRMS for 1 min.
– IEC60747-5-2 (pending)
Applications
Industrial fieldbus communications
– Profibus, DeviceNet, CAN, RS485
Programmable Logic Control
Isolated Data Acquisition System
Description
The FOD8001 is a 3.3V/5V high-speed logic gate
Optocoupler, which supports isolated communications
allowing digital signals to communicate between sys-
tems without conducting ground loops or hazardous
voltages. It utilizes Fairchild’s patented coplanar packag-
ing technology, Optoplanar®, and optimized IC design to
achieve high noise immunity, characterized by high
common mode rejection and power supply rejection
specifications.
This high-speed logic gate optocoupler, packaged in a
compact 8-pin small outline package, consists of a high-
speed AlGaAs LED driven by a CMOS buffer IC coupled
to a CMOS detector IC. The detector IC comprises an
integrated photodiode, a high-speed transimpedance
amplifier and a voltage comparator with an output driver.
The CMOS technology coupled to the high efficiency of
the LED achieves low power consumption as well as
very high speed (40ns propagation delay, 6ns pulse
width distortion).
Related Resources
www.fairchildsemi.com/products/opto/
www.fairchildsemi.com/pf/FO/FOD0721.html
www.fairchildsemi.com/pf/FO/FOD0720.html
www.fairchildsemi.com/pf/FO/FOD0710.html
Functional Schematic
VDD1 1
8 VDD2
VI 2
7 NC
* 3 6 VO
GND1 4
5 GND2
*: Pin 3 must be left unconnected
©2008 Fairchild Semiconductor Corporation
FOD8001 Rev. 1.0.2
Truth Table
VI LED
H OFF
L ON
VO
H
L
www.fairchildsemi.com

1 page




FOD8001 pdf
Typical Performance Curves
Figure 1. Typical Output Voltage vs. Input Voltage
4.0
VDD1 = VDD2 = 3.3V
3.5
www.datasheet4u3..c0om
2.5
2.0
1.5
1.0
0.5
0.0
0
1234
VI - Input Voltage (V)
5
Figure 2. Input Voltage Switching Threshold vs. Input Supply Voltage
2.0
VDD2 = 3.3V
1.8
1.6
1.4
1.2
1.0
3.0
3.5 4.0 4.5 5.0
VDD1 - Input Supply Voltage (V)
5.5
Figure 3. Propogation Delay vs. Ambient Temperature
32
Frequency = 12.5MHz
Duty Cycle = 50%
VDD1 = VDD2 = 3.3V
30
28
26
t
PHL
24 t
PLH
22
20
-40
-20
0 20 40 60
TA - Ambient Temperature (°C)
80 100
Figure 5. Typical Rise Time vs. Ambient Temperature
7.5
Frequency = 12.5MHz
Duty Cycle = 50%
VDD1= VDD2 = 3.3V
7.0
6.5
6.0
5.5
-40
-20
0 20 40 60
TA - Ambient Temperature (°C)
80 100
Figure 4. Pulse Width Distortion vs. Ambient Temperature
4.0
Frequency = 12.5MHz
Duty Cycle = 50%
3.5 VDD1 = VDD2 = 3.3V
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-40
-20
0 20 40 60
TA - Ambient Temperature (°C)
80 100
Figure 6. Typical Fall Time vs. Ambient Temperature
7.5
Frequency = 12.5MHz
Duty Cycle = 50%
VDD1 = VDD2 = 3.3V
7.0
6.5
6.0
5.5
5.0
4.5
4.0
-40
-20
0 20 40 60
TA - Ambient Temperature (°C)
80 100
©2008 Fairchild Semiconductor Corporation
FOD8001 Rev. 1.0.2
5
www.fairchildsemi.com

5 Page





FOD8001 arduino
Reflow Profile
www.datasheet4u.com
Temperature
(°C)
300
280
260
240
220
200
180
160
140
120
100
80
60
40
20
0
0
260°C
>245°C = 42 Sec
Time above
183°C = 90 Sec
1.822°C/Sec Ramp up rate
33 Sec
60
120 180
Time (s)
270 360
©2008 Fairchild Semiconductor Corporation
FOD8001 Rev. 1.0.2
11
www.fairchildsemi.com

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