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74HC2G34 반도체 회로 부품 판매점

Dual Buffer Gate



NXP Semiconductors 로고
NXP Semiconductors
74HC2G34 데이터시트, 핀배열, 회로
www.DataSheet4U.com
74HC2G34; 74HCT2G34
Dual buffer gate
Rev. 01 — 6 October 2006
Product data sheet
1. General description
The 74HC2G34; 74HCT2G34 is a high-speed Si-gate CMOS device.
The 74HC2G34; 74HCT2G34 provides two buffers.
2. Features
I Wide supply voltage range from 2.0 V to 6.0 V
I Complies with JEDEC standard no. 7A
I High noise immunity
I ESD protection:
N HBM JESD22-A114-D exceeds 2000 V
N MM JESD22-A115-A exceeds 200 V
I Low power dissipation
I Balanced propagation delays
I Unlimited input rise and fall times
I Multiple package options
I Specified from 40 °C to +85 °C and 40 °C to +125 °C
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
74HC2G34GW
40 °C to +125 °C SC-88
74HC2G34GV
40 °C to +125 °C SC-74
74HCT2G34GW 40 °C to +125 °C SC-88
74HCT2G34GV 40 °C to +125 °C SC-74
4. Marking
Description
plastic surface-mounted package; 6 leads
plastic surface-mounted package (TSOP6); 6 leads
plastic surface-mounted package; 6 leads
plastic surface-mounted package (TSOP6); 6 leads
Version
SOT363
SOT457
SOT363
SOT457
Table 2. Marking
Type number
74HC2G34GW
74HC2G34GV
74HCT2G34GW
74HCT2G34GV
Marking code
PA
P34
UA
U34
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74HC2G34 데이터시트, 핀배열, 회로
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NXP Semiconductors
5. Functional diagram
74HC2G34; 74HCT2G34
Dual buffer gate
1 1A
1Y 6
1
1
6
3 2A
2Y 4
mnb063
Fig 1. Logic symbol
1
3
4
mnb064
Fig 2. IEC logic symbol
6. Pinning information
6.1 Pinning
Fig 4. Pin configuration
74HC2G34
74HCT2G34
1A 1
6 1Y
GND 2
5 VCC
2A 3
4 2Y
001aaf303
6.2 Pin description
Table 3.
Symbol
1A
GND
2A
2Y
VCC
1Y
Pin description
Pin
1
2
3
4
5
6
Description
data input
ground (0 V)
data input
data output
supply voltage
data output
AY
001aac536
Fig 3. Logic diagram (one gate)
74HC_HCT2G34_1
Product data sheet
4 U .com
Rev. 01 — 6 October 2006
© NXP B.V. 2006. All rights reserved.
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