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MC74AC00 반도체 회로 부품 판매점

Quad 2-Input NAND Gate



ON Semiconductor 로고
ON Semiconductor
MC74AC00 데이터시트, 핀배열, 회로
MQuCa7d4A2C−I0ene0pt,u4UMt .NCcoA7m4NADCGTa0t0eHigh−Performance Silicon−Gate CMOS
taShFeatures
aOutput Drive Capability: $24 mA
.DOperating Voltage Range: 2 to 6 V AC00; 4.5 to 5.5 ACT00
wLow Input Current: 1.0 mA
wHigh Noise Immunity Characteristic of CMOS Devices
w In Compliance With the JEDEC Standard No. 7A Requirements
mChip Complexity: 32 FETs
oPb−Free Packages are Available*
.cA1 1
UB1 2
3
Y1
t4A2 4
B2 5
eA3 9
eB3 10
6
Y2
Y = AB
8 Y3
hA4 12
SB4 13
11 Y4
taPIN 14 = VCC
PIN 7 = GND
aFigure 1. Logic Diagram
.DVCC B4 A4 Y4 B3 A3 Y3
14 13 12 11 10 9 8
www om1 2 3 4 5 6 7
.cA1 B1 Y1 A2 B2 Y2 GND
heet4UFigure 2. Pinout: 14−Lead Packages (Top View)
http://onsemi.com
MARKING
DIAGRAMS
14
1
14
1
PDIP−14
N SUFFIX
CASE 646
14
MC74XXX00N
AWLYYWW
1
SOIC−14
D SUFFIX
CASE 751A
14
XXX00
AWLYWW
1
1
14
TSSOP−14
DT SUFFIX
CASE 948G
14
XXX
00
ALYW
1
14
1
14
SOEIAJ−14
M SUFFIX
CASE 965
74XXX00
ALYW
1
XXX = AC or ACT
A = Assembly Location
WL or L = Wafer Lot
YY or Y = Year
WW or W = Work Week
FUNCTION TABLE
Inputs
Output
AB
Y
LL
LH
HL
HH
H
H
H
L
ataS*For additional information on our Pb−Free strategy and soldering details, please
.Ddownload the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
www© Semiconductor Components Industries, LLC, 2005
1
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
Publication Order Number:
January, 2005 − Rev. 8
MC74AC00/D


MC74AC00 데이터시트, 핀배열, 회로
MC74AC00, MC74ACT00
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
VCC
VI
VO
IIK
IOK
IO
ICC
IGND
TSTG
TL
TJ
qJA
DC Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Sink/Source Current
DC Supply Current per Output Pin
DC Ground Current per Output Pin
Storage Temperature Range
Lead temperature, 1 mm from Case for 10 Seconds
Junction temperature under Bias
Thermal resistance
(Note 1)
PDIP
SOIC
TSSOP
*0.5 to )7.0
*0.5 v VI v VCC )0.5
*0.5 v VO v VCC )0.5
$20
$50
$50
$50
$50
*65 to )150
260
)150
78
125
170
V
V
V
mA
mA
mA
mA
mA
°C
°C
°C
°C/W
PD Power Dissipation in Still Air at 85°C
PDIP
SOIC
TSSOP
78 mW
125
170
MSL
Moisture Sensitivity
Level 1
FR
VESD
Flammability Rating
ESD Withstand Voltage
Oxygen Index: 30% − 35%
Human Body Model (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
UL 94 V−0 @ 0.125 in
> 2000
> 200
> 1000
V
ILatch−Up Latch−Up Performance Above VCC and Below GND at 85°C (Note 5)
$100
mA
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. IO absolute maximum rating must be observed.
2. Tested to EIA/JESD22−A114−A.
3. Tested to EIA/JESD22−A115−A.
4. Tested to JESD22−C101−A.
5. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min Typ Max Unit
VCC Supply Voltage
MC74AC00
2.0
5.0
6.0
MC74ACT00
4.5
5.0
5.5
V
Vin, Vout
DC Input Voltage, Output Voltage (Ref. to GND)
0 − VCC V
tr, tf Input Rise and Fall Time (Note 6)
MC74AC00
VCC @ 3.0 V
150
− ns/V
VCC @ 4.5 V
40
VCC @ 5.5 V
25
tr, tf Input Rise and Fall Time (Note 7)
MC74ACT00
VCC @ 4.5 V
10
− ns/V
VCC @ 5.5 V
8.0
TJ Junction Temperature
− − 150 °C
TA Operating Ambient Temperature Range
−55 25 125 °C
IOH Output Current − High
− − −24 mA
IOL Output Current − Low
6. Vin from 30% to 70% VCC.
7. Vin from 0.8 V to 2.0 V.
− − 24 mA
http://onsemi.com
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