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PDF 74HCT08 Data sheet ( Hoja de datos )
| Número de pieza | 74HCT08 | |
| Descripción | Quad 2-input AND gate | |
| Fabricantes | Philips | |
| Logotipo |  |
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INTEGRATED CIRCUITS
DATA SHEET
74HC08; 74HCT08
Quad 2-input AND gate
Product specification
Supersedes data of 1990 Dec 01
2003 Jul 25
1 page  
Philips Semiconductors
Quad 2-input AND gate
Product specification
74HC08; 74HCT08
handbook, halfpAage
B
Y
MNB037
handbook, halfpAage
B
Y
MNA221
Fig.5 HC logic diagram (one gate).
Fig.6 HCT logic diagram (one gate).
RECOMMENDED OPERATING CONDITIONS
SYMBOL PARAMETER
VCC
VI
VO
Tamb
tr, tf
supply voltage
input voltage
output voltage
ambient
temperature
input rise and fall
times
CONDITIONS
74HC08
74HCT08
UNIT
MIN. TYP. MAX. MIN. TYP. MAX.
2.0 5.0 6.0 4.5 5.0 5.5 V
0 − VCC 0 − VCC V
0 − VCC 0 − VCC V
see DC and AC
−40 +25 +125 −40 +25 +125 °C
characteristics per device
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
− − 1000 − − − ns
− 6.0 500 − 6.0 500 ns
− − 400 − − − ns
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
SYMBOL
PARAMETER
VCC
IIK
IOK
IO
ICC, IGND
Tstg
Ptot
supply voltage
input diode current
output diode current
output source or sink current
VCC or GND current
storage temperature
power dissipation
DIP14 package
other packages
CONDITIONS
VI < −0.5 V or VI > VCC + 0.5 V
VO < −0.5 V or VO > VCC + 0.5 V
−0.5 V < VO < VCC + 0.5 V
MIN.
−0.5
−
−
−
−
−65
MAX.
+7.0
±20
±20
±25
±50
+150
UNIT
V
mA
mA
mA
mA
°C
Tamb = −40 to +125 °C; note 1
Tamb = −40 to +125 °C; note 2
−
−
750 mW
500 mW
Notes
1. For DIP14 packages: above 70 °C derate linearly with 12 mW/K.
2. For SO14 packages: above 70 °C derate linearly with 8 mW/K.
For SSOP14 and TSSOP14 packages: above 60 °C derate linearly with 5.5 mW/K.
For DHVQFN14 packages: above 60 °C derate linearly with 4.5 mW/K.
2003 Jul 25
5
5 Page 
Philips Semiconductors
Quad 2-input AND gate
Product specification
74HC08; 74HCT08
AC CHARACTERISTICS
Family 74HC08
GND = 0 V; tf = tf = 6 ns; CL = 50 pF.
SYMBOL
PARAMETER
Tamb = 25 °C
tPHL/tPLH
propagation delay nA,
nB to nY
tTHL/tTLH output transition time
Tamb = −40 to +85 °C
tPHL/tPLH
propagation delay nA,
nB to nY
tTHL/tTLH output transition time
Tamb = −40 to +125 °C
tPHL/tPLH
propagation delay nA,
nB to nY
tTHL/tTLH output transition time
TEST CONDITIONS
WAVEFORMS VCC (V)
MIN.
TYP.
MAX.
UNIT
see Figs 7 and 8 2.0
4.5
6.0
see Figs 7 and 8 2.0
4.5
6.0
−
−
−
−
−
−
25 90
9 18
7 15
19 75
7 15
6 13
ns
ns
ns
ns
ns
ns
see Figs 7 and 8 2.0
−
−
115
ns
4.5 − − 23
ns
6.0 − − 20
ns
see Figs 7 and 8 2.0
−
−
95
ns
4.5 − − 19
ns
6.0 − − 16
ns
see Figs 7 and 8 2.0
−
−
135
ns
4.5 − − 27
ns
6.0 − − 23
ns
see Figs 7 and 8 2.0
−
−
110
ns
4.5 − − 22
ns
6.0 − − 19
ns
2003 Jul 25
11
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet 74HCT08.PDF ] | |
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