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74VHC08N 반도체 회로 부품 판매점

Quad 2-Input AND Gate



Fairchild Semiconductor 로고
Fairchild Semiconductor
74VHC08N 데이터시트, 핀배열, 회로
December 2007
74VHC08
Quad 2-Input AND Gate
Features
High Speed: tPD = 4.3ns (Typ.) at TA = 25°C
High noise immunity: VNIH = VNIL = 28% VCC (Min.)
Power down protection is provided on all inputs
Low power dissipation: ICC = 2µA (Max.) @ TA = 25°C
Low noise: VOLP = 0.8V (Max.)
Pin and function compatible with 74HC08
General Description
The VHC08 is an advanced high speed CMOS 2 Input
AND Gate fabricated with silicon gate CMOS technol-
ogy. It achieves the high-speed operation similar to
equivalent Bipolar Schottky TTL while maintaining the
CMOS low power dissipation.
The internal circuit is composed of 4 stages including
buffer output, which provide high noise immunity and
stable output. An input protection circuit insures that 0V
to 7V can be applied to the input pins without regard to
the supply voltage. This device can be used to interface
5V to 3V systems and two supply systems such as bat-
tery backup. This circuit prevents device destruction due
to mismatched supply and input voltages.
Ordering Information
Order Number
74VHC08M
74VHC08SJ
74VHC08MTC
Package
Number
M14A
M14D
MTC14
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150"
Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
4.4mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
©1992 Fairchild Semiconductor Corporation
74VHC08 Rev. 1.4.0
www.fairchildsemi.com


74VHC08N 데이터시트, 핀배열, 회로
Connection Diagram
Logic Symbol
IEEE/IEC
Pin Description
Pin Names
An, Bn
On
Description
Inputs
Outputs
Truth Table
A
L
L
H
H
B
L
H
L
H
O
L
L
L
H
©1992 Fairchild Semiconductor Corporation
74VHC08 Rev. 1.4.0
2
www.fairchildsemi.com




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