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74ACT10SC 반도체 회로 부품 판매점

Triple 3-Input NAND Gate



Fairchild Semiconductor 로고
Fairchild Semiconductor
74ACT10SC 데이터시트, 핀배열, 회로
November 1988
Revised February 2005
74AC10 74ACT10
Triple 3-Input NAND Gate
General Description
The AC/ACT10 contains three, 3-input NAND gates.
Features
s ICC reduced by 50% on 74AC only
s Outputs source/sink 24 mA
Ordering Code:
Order Number Package Number
Package Description
74AC10SC
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74AC10SJ
M14D
Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74AC10MTC
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74AC10PC
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
74AC10PC_NL
(Note 1)
N14A
Pb-Free 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
74ACT10SC
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74ACT10PC
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Use this number to order device.
Logic Symbol
www.DataSheet4U.com
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
An, Bn, Cn
On
Description
Inputs
Outputs
© 2005 Fairchild Semiconductor Corporation DS009915
www.fairchildsemi.com


74ACT10SC 데이터시트, 핀배열, 회로
Absolute Maximum Ratings(Note 2)
Supply Voltage (VCC)
DC Input Diode Current (IIK)
VI 0.5V
VI VCC  0.5V
DC Input Voltage (VI)
DC Output Diode Current (IOK)
VO 0.5V
VO VCC  0.5V
DC Output Voltage (VO)
DC Output Source
or Sink Current (IO)
DC VCC or Ground Current
per Output Pin (ICC or IGND)
Storage Temperature (TSTG)
Junction Temperature (TJ)
PDIP
0.5V to 7.0V
20 mA
20 mA
0.5V to VCC  0.5V
20 mA
20 mA
0.5V to VCC  0.5V
r 50 mA
r 50 mA
65qC to 150qC
140qC
Recommended Operating
Conditions
Supply Voltage (VCC)
AC
2.0V to 6.0V
ACT
4.5V to 5.5V
Input Voltage (VI)
Output Voltage (VO)
Operating Temperature (TA)
Minimum Input Edge Rate ('V/'t)
0V to VCC
0V to VCC
40qC to 85qC
AC Devices
VIN from 30% to 70% of VCC
VCC @ 3.3V, 4.5V, 5.5V
Minimum Input Edge Rate ('V/'t)
125 mV/ns
ACT Devices
VIN from 0.8V to 2.0V
VCC @ 4.5V, 5.5V
125 mV/ns
Note 2: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, with-
out exception, to ensure that the system design is reliable over its power
supply, temperature, and output/input loading variables. Fairchild does not
recommend operation of circuits outside databook specifications.
DC Electrical Characteristics for AC
Symbol
Parameter
VIH Minimum HIGH Level
Input Voltage
VIL Maximum LOW Level
Input Voltage
VOH Minimum HIGH Level
Output Voltage
VCC
TA 25qC
TA 40qC to 85qC
(V) Typ
Guaranteed Limits
3.0 1.5 2.1
2.1
4.5 2.25 3.15
3.15
5.5 2.75 3.85
3.85
3.0 1.5 0.9
0.9
4.5 2.25 1.35
1.35
5.5 2.75 1.65
1.65
3.0 2.99 2.9
2.9
4.5 4.49 4.4
4.4
5.5 5.49 5.4
5.4
VOL Maximum LOW Level
Output Voltage
3.0 2.56
4.5 3.86
5.5 4.86
3.0 0.002 0.1
4.5 0.001 0.1
5.5 0.001 0.1
2.46
3.76
4.76
0.1
0.1
0.1
3.0
0.36
0.44
4.5
0.36
0.44
5.5
0.36
0.44
IIN
(Note 5)
Maximum Input
Leakage Current
5.5
r0.1 r1.0
IOLD
IOHD
ICC
(Note 5)
Minimum Dynamic
Output Current (Note 4)
Maximum Quiescent
Supply Current
5.5
5.5
5.5
75
75
2.0 20.0
Note 3: All outputs loaded; thresholds on input associated with output under test.
Note 4: Maximum test duration 2.0 ms, one output loaded at a time.
Note 5: IIN and ICC @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V VCC.
Units
Conditions
VOUT 0.1V
V or VCC  0.1V
VOUT 0.1V
V or VCC  0.1V
V IOUT 50 PA
VIN VILor VIH
IOH 12 mA
V IOH 24 mA
IOH 24 mA (Note 3)
V IOUT 50 PA
VIN VIL or VIH
IOL 12 mA
V IOL 24 mA
IOL 24 mA (Note 3)
PA VI VCC
or GND
mA VOLD 1.65V Max
mA VOHD 3.85V Min
PA VIN VCC
or GND
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74ACT10SC gate

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74ACT10SC

Triple 3-Input NAND Gate - Fairchild Semiconductor