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National Semiconductor |
December 1994
54F/74F11
Triple 3-Input AND Gate
General Description
This device contains three independent gates, each of which
performs the logic AND function.
Ordering Code: See Section 0
Commercial
Military
74F11PC
74F11SC (Note 1)
74F11SJ (Note 1)
54F11DM (Note 2)
54F11FM (Note 2)
54F11LM (Note 2)
Package
Number
N14A
J14A
M14A
M14D
W14B
E20A
Package Description
14-Lead (0.300" Wide) Molded Dual-In-Line
14-Lead Ceramic Dual-In-Line
14-Lead (0.150" Wide) Molded Small Outline, JEDEC
14-Lead (0.300" Wide) Molded Small Outline, EIAJ
14-Lead Cerpack
20-Lead Ceramic Leadless Chip Carrier, Type C
Note 1: Devices also available in 13" reel. Use suffix = SCX and SJX.
Note 2: Military grade device with environmental and burn-in processing. Use suffix = DMQB, FMQB and LMQB.
Logic Symbol
IEEE/IEC
DSXXX
DS009459-3
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
© 1997 National Semiconductor Corporation DS009459
PrintDate=1997/08/26 PrintTime=16:09:23 9520 ds009459 Rev. No. 1 cmserv Proof
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Connection Diagrams
Pin Assignment for
DIP, SOIC and Flatpak
Pin Assignment
for LCC
DS009459-2
Unit Loading/Fan Out
See Section 0 for U.L. definitions
Pin Names
Description
An, Bn, Cn
On
Inputs
Outputs
U.L.
HIGH/LOW
1.0/1.0
50/33.3
54F/74F
Input IIH/IIL
Output IOH/IOL
20 µA/−0.6 mA
−1 mA/20 mA
DS009459-1
DSXXX
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PrintDate=1997/08/26 PrintTime=16:09:25 9520 ds009459 Rev. No. 1 cmserv Proof
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