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PDF 74AUC1G00GV Data sheet ( Hoja de datos )
| Número de pieza | 74AUC1G00GV | |
| Descripción | Single 2-input NAND gate | |
| Fabricantes | NXP Semiconductors | |
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INTEGRATED CIRCUITS
DATA SHEET
74AUC1G00
Single 2-input NAND gate
Preliminary specification
File under Integrated Circuits, IC24
2002 Nov 12
1 page  
Philips Semiconductors
Single 2-input NAND gate
Preliminary specification
74AUC1G00
DC CHARACTERISTICS
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
SYMBOL PARAMETER
TEST CONDITIONS
OTHER
VCC (V)
VIH HIGH-level input
voltage
0.8
1.1 to 2.3
2.3 to 2.7
VIL LOW-level input
voltage
0.8
1.1 to 2.3
2.3 to 2.7
VOH HIGH-level output VI = VIH or VIL; IO = −100 µA 0.8 to 2.7
voltage
VI = VIH or VIL; IO =− 700 µA 0.8
VI = VIH or VIL; IO =− 3 mA 1.1
VI = VIH or VIL; IO = −5 mA 1.5
VI = VIH or VIL; IO = −8 mA 1.65
VI = VIH or VIL; IO = −9 mA 2.3
VOL LOW-level output VI = VIH or VIL; IO = 100 µA 0.8 to 2.7
voltage
VI = VIH or VIL; IO = 700 µA 0.8
VI = VIH or VIL; IO = 3 mA 1.1
VI = VIH or VIL; IO = 5 mA 1.5
VI = VIH or VIL; IO = 8 mA 1.65
VI = VIH or VIL; IO = 9 mA 2.3
II
input leakage
VI = VCC or GND
current
0 to 2.7
Ioff
power OFF
VI or VO = 2.7 V
leakage current
0
ICC
quiescent supply VI = VCC or GND; IO = 0
0.8 to 2.7
current
Tamb (°C)
−40 to +85
UNIT
MIN. TYP.(1) MAX.
VCC
−
0.65 × VCC −
1.7 −
−−
−−
−−
VCC − 0.1 −
− 0.55
VCC − 0.3 −
VCC − 0.4 −
VCC − 0.45 −
1.8 −
−−
− 0.25
−−
−−
−−
−−
− ±0.1
−V
−V
−V
GND
V
0.35 × VCC V
0.7 V
−V
−V
−V
−V
−V
−V
0.2 V
−V
0.3 V
0.4 V
0.45 V
0.6 V
±5 µA
−
±0.1 ±10
µA
−
0.1 10
µA
Note
1. All typical values are at VCC = 1.8 V and Tamb = 25 °C.
2002 Nov 12
5
5 Page 
Philips Semiconductors
Single 2-input NAND gate
Preliminary specification
74AUC1G00
Suitability of surface mount IC packages for wave and reflow soldering methods
PACKAGE
BGA, HBGA, LFBGA, SQFP, TFBGA
HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN, SMS
PLCC(3), SO, SOJ
LQFP, QFP, TQFP
SSOP, TSSOP, VSO
SOLDERING METHOD
WAVE
REFLOW(1)
not suitable
suitable
not suitable(2)
suitable
suitable
suitable
not recommended(3)(4) suitable
not recommended(5) suitable
Notes
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.
2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
2002 Nov 12
11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet 74AUC1G00GV.PDF ] | |
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