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DUAL NOR GATE



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74AUP2G02 데이터시트, 핀배열, 회로
74AUP2G02
DUAL NOR GATE
Description
Pin Assignments
The Advanced Ultra Low Power (AUP) CMOS logic family is designed
for low power and extended battery life in portable applications.
The 74AUP2G02 is a dual two-input NOR gate. Both gates have
push-pull outputs designed for operation over a power supply range
of 0.8 V to 3.6 V. The device is fully specified for partial power down
applications using IOFF. The IOFF circuitry disables the output
preventing damaging current backflow when the device is powered
down. Each gate performs the positive Boolean function:
Y = A + B or Y = A B
(Top View)
X2-DFN1210-8
Features
Advanced Ultra Low Power (AUP) CMOS
Supply Voltage Range from 0.8V to 3.6V
±4mA Output Drive at 3.0V
Low Static Power Consumption
ICC < 0.9µA
Low Dynamic Power Consumption
CPD = 6 pF (Typical at 3.6V)
Schmitt Trigger Action at all inputs makes the circuit tolerant
for slower input rise and fall time. The hysteresis is typically
250 mV at VCC = 3.0V
IOFF Supports Partial-Power-Down Mode Operation
ESD Protection Exceeds JESD 22
2000-V Human Body Model (A114)
Exceeds 1000-V Charged Device Model (C101)
Latch-Up Exceeds 100mA per JESD 78, Class I
Leadless Packages Named per JESD30E
Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)
Halogen and Antimony Free. “Green” Device (Note 3)
Applications
Suited for Battery and Low Power Needs
Wide array of products such as:
ƒ Tablets, E-readers
ƒ Cell Phones, Personal Navigation / GPS
ƒ MP3 Players, Cameras, Video Recorders
ƒ PCs, Ultrabooks, Notebooks, Netbooks
ƒ Computer Peripherals, Hard Drives, SSD, CD/DVD ROM
ƒ TV, DVD, DVR, Set-Top Box
Notes:
1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant.
2. See http://www.diodes.com/quality/lead_free.html for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free,
"Green" and Lead-free.
3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl)
and <1000ppm antimony compounds.
74AUP2G02
Document number: DS36140 Rev. 1 - 2
1 of 9
www.diodes.com
January 2015
© Diodes Incorporated


74AUP2G02 데이터시트, 핀배열, 회로
74AUP2G02
Ordering Information
74AUP2G 02 XXX -7
Logic Device
74 : Logic Prefix
AUP : 0.8 to 3.6 V
Logic Family
2G : Dual Gate
Function
02 : 2-Input
NOR Gates
Package
RA3 : X2-DFN1210-8
Packing
-7 : 7” Tape & Reel
Device
Package
Code
74AUP2G02RA3-7
RA3
Package
(Notes 4 & 5)
X2-DFN1210-8
Package
Size
1.2mm X 1.0mm X 0.35mm
0.3 mm lead pitch
7” Tape and Reel
Quantity
Part Number
Suffix
5,000/Tape & Reel
-7
Notes: 4. Pad layout as shown on Diodes Inc. suggested pad layout document AP02001, which can be found on our website at
http://www.diodes.com/datasheets/ap02001.pdf.
5. The taping orientation is located on our website at http://www.diodes.com/datasheets/ap02007.pdf.
Pin Descriptions
Pin Name
1A
1B
2Y
GND
2A
2B
1Y
VCC
Pin No.
1
2
3
4
5
6
7
8
Data Input
Data Input
Data Output
Ground
Data Input
Data Input
Data Output
Supply Voltage
Logic Diagram
Function
Function Table
Inputs
AB
LL
LH
HL
HH
74AUP2G02
Document number: DS36140 Rev. 1 - 2
Output
Y
H
L
L
L
2 of 9
www.diodes.com
January 2015
© Diodes Incorporated




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