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74AUP1G97 반도체 회로 부품 판매점

Low Power Universal Configurable Two-Input Logic Gate



Fairchild Semiconductor 로고
Fairchild Semiconductor
74AUP1G97 데이터시트, 핀배열, 회로
October 2010
74AUP1G97
TinyLogic® Low Power Universal Configurable
Two-Input Logic Gate
Features
ƒ 0.8V to 3.6V VCC Supply Operation
ƒ 3.6V Over-Voltage Tolerant I/Os at VCC
from 0.8V to 3.6V
ƒ High Speed tPD
- 3.1ns: Typical at 3.3V
ƒ Power-Off High-Impedance Inputs and Outputs
ƒ Low Static Power Consumption
- ICC=0.9µA Maximum
ƒ Low Dynamic Power Consumption
- CPD=2.5pF Typical at 3.3V
ƒ Ultra-Small MicroPak™ Packages
Description
The 74AUP1G97 is a universal configurable 2-input
logic gate that provides a high performance and low
power solution ideal for battery-powered portable
applications. This product is designed for a wide low
voltage operating range (0.8V to 3.6V) and guarantees
very low static and dynamic power consumption across
the entire voltage range. All inputs are implemented
with hysteresis to allow for slower transition input
signals and better switching noise immunity.
The 74AUP1G97 provides for multiple functions as
determined by various configurations of the three
inputs. The potential logic functions provided are MUX,
AND, OR, NAND, and NOR, inverter and buffer. Refer
to Figures 3 to 9.
Ordering Information
Part Number Top Mark
Package
74AUP1G97L6X
AD 6-Lead MicroPak™, 1.0mm Wide
74AUP1G97FHX
AD 6-Lead, MicroPak2™, 1x1mm Body, .35mm Pitch
Packing Method
5000 Units on
Tape & Reel
5000 Units on
Tape & Reel
© 2008 Fairchild Semiconductor Corporation
74AUP1G97 • 1.0.5
www.fairchildsemi.com


74AUP1G97 데이터시트, 핀배열, 회로
Logic Diagram
3
A
1
B
6
C
Figure 1. Logic Diagram (Positive Logic)
Pin Configurations
B1
GND 2
A3
6C
5 VCC
4Y
Figure 2. MicroPak™ (Top Through View)
4Y
Pin Definitions
Pin #
1
2
3
4
5
6
Name
B
GND
A
Y
VCC
C
Description
Data Input
Ground
Data Input
Output
Supply Voltage
Data Input
© 2008 Fairchild Semiconductor Corporation
74AUP1G97 • 1.0.5
2
www.fairchildsemi.com




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74AUP1G97 gate

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