74LVC2G02 반도체 회로 부품 판매점

Dual 2-input NOR gate



NXP Semiconductors 로고
NXP Semiconductors
74LVC2G02 데이터시트, 핀배열, 회로
74LVC2G02
Dual 2-input NOR gate
Rev. 11 — 8 April 2013
Product data sheet
1. General description
The 74LVC2G02 provides a 2-input NOR gate function.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these
devices as translators in a mixed 3.3 V and 5 V environment.
This device is fully specified for partial power-down applications using IOFF. The IOFF
circuitry disables the output, preventing a damaging backflow current through the device
when it is powered down.
2. Features and benefits
Wide supply voltage range from 1.65 V to 5.5 V
5 V tolerant outputs for interfacing with 5 V logic
High noise immunity
24 mA output drive (VCC = 3.0 V)
CMOS low power consumption
Complies with JEDEC standard:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8-B/JESD36 (2.7 V to 3.6 V)
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Inputs accept voltages up to 5 V
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from 40 C to +85 C and 40 C to +125 C

74LVC2G02 데이터시트, 핀배열, 회로
NXP Semiconductors
74LVC2G02
Dual 2-input NOR gate
3. Ordering information
Table 1. Ordering information
Type number Package
Temperature range Name
74LVC2G02DP 40 C to +125 C TSSOP8
74LVC2G02DC 40 C to +125 C VSSOP8
74LVC2G02GT 40 C to +125 C XSON8
74LVC2G02GF 40 C to +125 C XSON8
74LVC2G02GD 40 C to +125 C XSON8
74LVC2G02GM 40 C to +125 C XQFN8
74LVC2G02GN 40 C to +125 C XSON8
74LVC2G02GS 40 C to +125 C XSON8
Description
Version
plastic thin shrink small outline package; 8 leads;
body width 3 mm; lead length 0.5 mm
SOT505-2
plastic very thin shrink small outline package; 8 leads; SOT765-1
body width 2.3 mm
plastic extremely thin small outline package; no leads; SOT833-1
8 terminals; body 1 1.95 0.5 mm
extremely thin small outline package; no leads;
8 terminals; body 1.35 1 0.5 mm
SOT1089
plastic extremely thin small outline package; no leads; SOT996-2
8 terminals; body 3 2 0.5 mm
plastic, extremely thin quad flat package; no leads;
8 terminals; body 1.6 1.6 0.5 mm
SOT902-2
extremely thin small outline package; no leads;
8 terminals; body 1.2 1.0 0.35 mm
SOT1116
extremely thin small outline package; no leads;
8 terminals; body 1.35 1.0 0.35 mm
SOT1203
4. Marking
Table 2. Marking codes
Type number
74LVC2G02DP
74LVC2G02DC
74LVC2G02GT
74LVC2G02GF
74LVC2G02GD
74LVC2G02GM
74LVC2G02GN
74LVC2G02GS
Marking code[1]
V02
V02
V02
VB
V02
V02
VB
VB
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
74LVC2G02
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 11 — 8 April 2013
© NXP B.V. 2013. All rights reserved.
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74LVC2G02 gate

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