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74HC86D 반도체 회로 부품 판매점

Quad Exclusive OR Gate



Toshiba 로고
Toshiba
74HC86D 데이터시트, 핀배열, 회로
74HC86D(X34TTD-411-02)
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
74HC86D
Quad Exclusive OR Gate
The 74HC86D is a high speed CMOS EXCLUSIVE OR GATE
fabricated with silicon gate C2MOS technology.
It achieves the high speed operation similar to equivalent
LSTTL while maintaining the CMOS low power dissipation.
Input and output buffers are provided which offer high noise
immunity and stable output.
All inputs are equipped with protection circuits against static
discharge or transient excess voltage.
Features
High speed: tpd = 10 ns (typ.) at VCC = 5 V
Low power dissipation: ICC = 1 A (max) at Ta = 25°C
High noise immunity: VNIH = VNIL = 28% VCC (min)
Output drive capability: 10 LSTTL loads
Symmetrical output impedance: |IOH| = IOL = 4 mA (min)
Balanced propagation delays: tpLH tpHL
Wide operating voltage range: VCC (opr) = 2 to 6 V
Pin Assignment
74HC86D
Weight
P-SOP14-0409-1.27-001 : 0.13 g (typ.)
Marking
TBD
1 2016-02-09


74HC86D 데이터시트, 핀배열, 회로
IEC Logic Symbol
74HC86D(X34TTD-411-02)
Truth Table
ABY
HH L
L HH
HLH
LLL
Absolute Maximum Ratings (Note 1)
Characteristics
Symbol
Rating
Unit
Supply voltage range
DC input voltage
DC output voltage
Input diode current
Output diode current
DC output current
DC VCC/ground current
Power dissipation
Storage temperature
VCC
VIN
VOUT
IIK
IOK
IOUT
ICC
PD
Tstg
0.5 to 7
0.5 to VCC 0.5
0.5 to VCC 0.5
20
20
25
50
180
65 to 150
V
V
V
mA
mA
mA
mA
mW
°C
Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or
even destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly
even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute
maximum ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
2 2016-02-09




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74HC86D gate

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