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PDF 74HCT377 Data sheet ( Hoja de datos )

Número de pieza 74HCT377
Descripción Octal D-type flip-flop
Fabricantes NXP Semiconductors 
Logotipo NXP Semiconductors Logotipo



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No Preview Available ! 74HCT377 Hoja de datos, Descripción, Manual

74HC377; 74HCT377
Octal D-type flip-flop with data enable; positive-edge trigger
Rev. 3 — 25 September 2013
Product data sheet
1. General description
The 74HC377; 74HCT377 is an octal positive-edge triggered D-type flip-flop. The device
features clock (CP) and data enable (E) inputs. When E is LOW, the outputs Qn assume
the state of their corresponding Dn inputs that meet the set-up and hold time requirements
on the LOW-to-HIGH clock (CP) transition. Input E must be stable one set-up time prior to
the LOW-to-HIGH transition for predictable operation. Inputs include clamp diodes that
enable the use of current limiting resistors to interface inputs to voltages in excess of VCC.
2. Features and benefits
Common clock and master reset
Eight positive edge-triggered D-type flip-flops
Complies with JEDEC standard no. 7A
Input levels:
For 74HC377: CMOS level
For 74HCT377: TTL level
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V.
Multiple package options
Specified from 40 C to +85 C and from 40 C to +125 C
3. Ordering information
Table 1. Ordering information
Type number Package
Temperature range Name Description
74HC377N 40 C to +85 C DIP20 plastic dual in-line package; 20 leads (300 mil)
74HCT377N
74HC377D 40 C to +85 C SO20
plastic small outline package; 20 leads; body width 7.5 mm
74HCT377D
74HC377DB 40 C to +85 C
74HCT377DB
SSOP20 plastic shrink small outline package; 20 leads; body width
5.3 mm
74HC377PW 40 C to +85 C
74HCT377PW
TSSOP20 plastic thin shrink small outline package; 20 leads; body
width 4.4 mm
Version
SOT146-1
SOT163-1
SOT339-1
SOT360-1

1 page




74HCT377 pdf
NXP Semiconductors
74HC377; 74HCT377
Octal D-type flip-flop with data enable; positive-edge trigger
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V)
Symbol Parameter
Conditions
Min Max Unit
VCC
IIK
IOK
IO
ICC
IGND
Tstg
Ptot
supply voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
VI < 0.5 V or VI > VCC + 0.5 V
VO < 0.5 V or VO > VCC + 0.5 V
0.5 V < VO < VCC + 0.5 V
Tamb = 40 C to +125 C
DIP20 package
0.5
[1] -
[1] -
-
-
50
65
[2] -
+7
20
20
25
50
-
+150
750
V
mA
mA
mA
mA
mA
C
mW
SO20, SSOP20, TSSOP20
[3] -
500 mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For DIP20 package: above 70 C the value of Ptot derates linearly with 12 mW/K.
[3] For SO20 package: above 70 C the value of Ptot derates linearly with 8 mW/K.
For SSOP20 and TSSOP20 packages: above 60 C the value of Ptot derates linearly with 5.5 mW/K.
8. Recommended operating conditions
Table 5. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V)
Symbol Parameter
Conditions
VCC
VI
VO
Tamb
t/V
supply voltage
input voltage
output voltage
ambient temperature
input transition rise and fall rate
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
74HC377
Min Typ Max
2.0 5.0 6.0
0 - VCC
0 - VCC
40 - +125
- - 625
- 1.67 139
- - 83
74HCT377
Min Typ Max
4.5 5.0 5.5
0 - VCC
0 - VCC
40 - +125
---
- 1.67 139
---
Unit
V
V
V
C
ns/V
ns/V
ns/V
74HC_HCT377
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 25 September 2013
© NXP B.V. 2013. All rights reserved.
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74HCT377 arduino
NXP Semiconductors
74HC377; 74HCT377
Octal D-type flip-flop with data enable; positive-edge trigger
VI
negative
pulse
0V
VI
positive
pulse
0V
90 %
10 %
VM
10 %
tf
tr
90 %
VM
tW
tW
VM
tr
tf
VM
VI
G
VCC
DUT
RT
VO
VCC
RL S1
CL
open
001aad983
Fig 8.
Test data is given in Table 9.
Definitions for test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
RL = Load resistance.
S1 = Test selection switch
Test circuit for measuring switching times
Table 9. Test data
Type
74HC377
74HCT377
Input
VI
VCC
3V
tr, tf
6 ns
6 ns
Load
CL
15 pF, 50 pF
15 pF, 50 pF
RL
1 k
1 k
S1 position
tPHL, tPLH
open
open
74HC_HCT377
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 25 September 2013
© NXP B.V. 2013. All rights reserved.
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