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74C374 반도체 회로 부품 판매점

3-STATE Octal D-Type Flip-Flop



Fairchild Semiconductor 로고
Fairchild Semiconductor
74C374 데이터시트, 핀배열, 회로
October 1987
Revised January 2004
www.DataSheet4U.com
MM74C373 MM74C374
3-STATE Octal D-Type Latch
3-STATE Octal D-Type Flip-Flop
General Description
The MM74C373 and MM74C374 are integrated, comple-
mentary MOS (CMOS), 8-bit storage elements with 3-
STATE outputs. These outputs have been specially
designed to drive high capacitive loads, such as one might
find when driving a bus, and to have a fan out of 1 when
driving standard TTL. When a high logic level is applied to
the OUTPUT DISABLE input, all outputs go to a high
impedance state, regardless of what signals are present at
the other inputs and the state of the storage elements.
The MM74C373 is an 8-bit latch. When LATCH ENABLE is
high, the Q outputs will follow the D inputs. When LATCH
ENABLE goes low, data at the D inputs, which meets the
set-up and hold time requirements, will be retained at the
outputs until LATCH ENABLE returns high again.
The MM74C374 is an 8-bit, D-type, positive-edge triggered
flip-flop. Data at the D inputs, meeting the set-up and hold
time requirements, is transferred to the Q outputs on posi-
tive-going transitions of the CLOCK input.
Both the MM74C373 and the MM74C374 are being assem-
bled in 20-pin dual-in-line packages with 0.300” pin cen-
ters.
Features
s Wide supply voltage range: 3V to 15V
s High noise immunity: 0.45 VCC (typ.)
s Low power consumption
s TTL compatibility:
Fan out of 1driving standard TTL
s Bus driving capability
s 3-STATE outputs
s Eight storage elements in one package
s Single CLOCK/LATCH ENABLE and OUTPUT DIS-
ABLE control inputs
s 20-pin dual-in-line package with 0.300” centers takes
half the board space of a 24-pin package
Ordering Code:
Order Number Package Number
Package Description
MM74C373M
(Note 1)
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
MM74C373N
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
MM74C374N
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Note 1: Devices also available in Tape and Reel. Specify by appending the suffix letter Xto the ordering code.
© 2004 Fairchild Semiconductor Corporation DS005906
www.fairchildsemi.com


74C374 데이터시트, 핀배열, 회로
Connection Diagrams
MM74C373
MM74C374
www.DataSheet4U.com
Top View
Truth Tables
MM74C373
Output
LATCH
Disable
ENABLE
LH
LH
LL
HX
L = LOW logic level
H = HIGH logic level
X = Irrelevant
D
H
L
X
X
Top View
Q
H
L
Q
Hi-Z
MM74C374
Output
Clock
Disable
L
L


LL
LH
HX
 = LOW-to-HIGH logic level transition
Q = Preexisting output level
Hi-Z = High impedance output state
D
H
L
X
X
X
Q
H
L
Q
Q
Hi-Z
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74C374 flip-flop

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74C374

3-STATE Octal D-Type Flip-Flop - Fairchild Semiconductor