(PDF) SY100EL31 Datasheet - D FLIP-FLOP WITH SET AND RESET

Número de pieza	SY100EL31
Descripción	D FLIP-FLOP WITH SET AND RESET
Fabricantes	Micrel Semiconductor
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No Preview Available ! D FLIP-FLOP WITH SET AND RESET SY10EL31 SY100EL31 FEATURES s 475ps propagation delay s 2.8GHz toggle frequency s Internal 75KΩ input pull-down resistors s Available in 8-pin SOIC package PIN CONFIGURATION/BLOCK DIAGRAM S1 D2 CLK 3 R4 S D Flip-Flop R 8 VCC 7Q 6Q 5 VEE SOIC TOP VIEW DESCRIPTION The SY10/100EL31 are D flip-flops with set and reset. The devices are functionally equivalent to the E131 devices, with higher performance capabilities. With propagation delays and output transition times significantly faster than the E131, the EL31 is ideally suited for those applications which require the ultimate in AC performance. Both the set and reset inputs are asynchronous, level triggered signals. Data enters the master portion of the flip-flop when the clock is LOW and is transferred to the slave, and thus the outputs, upon a positive transition of the clock. PIN NAMES Pin D Q S R CLK Function Data Inputs Data Outputs Set Reset Clock Input TRUTH TABLE(1) DS LL HL XH XL XH NOTE: 1. Z = LOW-to-HIGH transition. R L L L H H CLK Z Z X X X Q L H H L Undef Rev.: E Amendment: /0 1 Issue Date: August, 1998 1 page

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PDF SY100EL31 Data sheet ( Hoja de datos )