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PDF 74F825SC Data sheet ( Hoja de datos )
| Número de pieza | 74F825SC | |
| Descripción | 8-Bit D-Type Flip-Flop | |
| Fabricantes | National | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de 74F825SC (archivo pdf) en la parte inferior de esta página. Total 8 Páginas | ||
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December 1994
54F 74F825
8-Bit D-Type Flip-Flop
General Description
The ’F825 is an 8-bit buffered register It has Clock Enable
and Clear features which are ideal for parity bus interfacing
in high performance microprogramming systems Also in-
cluded in the ’F825 are multiple enables that allow multi-
user control of the interface
The ’F825 is functionally and pin compatible with AMD’s
Am29825
Features
Y TRI-STATE output
Y Clock enable and clear
Y Multiple output enables
Y Direct replacement for AMD’s Am24825
Commercial
Military
Package
Number
Package Description
74F825SPC
N24C
24-Lead (0 300 Wide) Molded Dual-In-Line
54F825SDM (Note 2)
J24F
24-Lead (0 300 Wide) Ceramic Dual-In-Line
74F825SC (Note 1)
M24B
24-Lead (0 300 Wide) Molded Small Outline JEDEC
54F825FM (Note 2)
W24C
24-Lead Cerpack
54F825LM (Note 2)
E28A
24-Lead Ceramic Leadless Chip Carrier Type C
Note 1 Devices also available in 13 reel Use suffix e SCX
Note 2 Military grade device with environmental and burn-in processing Use suffix e SDMQB FMQB and LMQB
Logic Symbols
IEEE IEC
TL F 9597 – 1
TRI-STATE is a registered trademark of National Semiconductor Corporation
C1995 National Semiconductor Corporation TL F 9597
TL F 9597 – 4
RRD-B30M75 Printed in U S A
1 page  
AC Electrical Characteristics
Symbol
Parameter
fmax
tPLH
tPHL
tPHL
tPZH
tPZL
tPHZ
tPLZ
Maximum Clock Frequency
Propagation Delay
CP to On
Propagation Delay
CLR to On
Output Enable Time
OE to On
Output Disable TIme
OE to On
74F
TA e a25 C
VCC e a5 0V
CL e 50 pF
Min Typ Max
100 160
20 65 95
20 66 95
4 0 7 4 12 0
2 0 6 5 10 5
2 0 6 6 10 5
15 35 70
15 33 70
54F
TA VCC e Mil
CL e 50 pF
Min Max
60
2 0 10 5
2 0 10 5
4 0 13 0
2 0 13 0
2 0 13 0
10 75
10 75
74F
TA VCC e Com
CL e 50 pF
Min Max
70
2 0 10 5
2 0 10 5
4 0 13 0
2 0 11 5
2 0 11 5
15 75
15 75
Units
MHz
ns
ns
ns
AC Operating Requirements
Symbol
Parameter
ts(H)
ts(L)
th(H)
th(L)
ts(H)
ts(L)
th(H)
th(L)
tw(H)
tw(L)
tw(L)
trec
Setup Time HIGH or LOW
Dn to CP
Hold Time HIGH or LOW
Dn to CP
Setup Time HIGH or LOW
EN to CP
Hold Time HIGH or LOW
EN to CP
CP Pulse Width
HIGH or LOW
CLR Pulse Width LOW
CLR Recovery Time
74F
TA e a25 C
VCC e a5 0V
Min Max
25
25
25
25
45
25
20
0
50
50
50
50
54F
TA VCC e Mil
Min Max
40
40
25
25
50
30
30
20
60
60
50
50
74F
TA VCC e Com
Min Max
30
30
25
25
50
30
10
0
60
60
50
50
Units
ns
ns
ns
ns
ns
Ordering Information
The device number is used to form part of a simplified purchasing code where the package type and temperature range are
defined as follows
74F 825 S C X
Temperature Range Family
74FeCommercial
54FeMilitary
Device Type
Package Code
SP e Slim Plastic DIP
SD e Slim Ceramic DIP
F e Flatpak
L e Leadless Chip Carrier (LCC)
S e Small Outline (SOIC)
Special Variations
X e Devices shipped in 13 reels
QB e Military grade with environmental
and burn-in processing shipped
in tubes
Temperature Range
CeCommercial (0 C to a70 C)
MeMilitary (b55 C to a125 C)
5
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet 74F825SC.PDF ] | |
Hoja de datos destacado
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| 74F825SC | 8-Bit D-Type Flip-Flop |  Fairchild |
| 74F825SC | 8-Bit D-Type Flip-Flop | National |
| 74F825SPC | 8-Bit D-Type Flip-Flop | Fairchild |
| 74F825SPC | 8-Bit D-Type Flip-Flop | National |
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