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74VHCT374 반도체 회로 부품 판매점

Octal D-Type Flip-Flop with 3-STATE Outputs



Fairchild Semiconductor 로고
Fairchild Semiconductor
74VHCT374 데이터시트, 핀배열, 회로
July 1997
Revised April 1999
74VHCT374A
Octal D-Type Flip-Flop with 3-STATE Outputs
General Description
The VHCT374A is an advanced high speed CMOS octal
flip-flop with 3-STATE output fabricated with silicon gate
CMOS technology. It achieves the high speed operation
similar to equivalent Bipolar Schottky TTL while maintain-
ing the CMOS low power dissipation. This 8-bit D-type flip-
flop is controlled by a clock input (CP) and an output
enable input (OE). When the OE input is HIGH, the eight
outputs are in a high impedance state.
Protection circuits ensure that 0V to 7V can be applied to
the input and output (Note 1) pins without regard to the
supply voltage. This device can be used to interface 3V to
5V systems and two supply systems such as battery back
up. This circuit prevents device destruction due to mis-
matched supply and input voltages.
Note 1: Outputs in OFF-State.
Features
s High speed: fMAX = 140 MHz (typ) at TA = 25°C
s High noise immunity: VIH = 2.0V, VIL = 0.8V
s Power down protection is provided on all inputs and out-
puts
s Low power dissipation:
ICC = 4 µA (max) @ TA = 25°C
s Pin and function compatible with 74HCT374
Ordering Code:
Order Number Package Number
Package Description
74VHCT374AM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74VHCT374ASJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74VHCT374AMTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74VHCT374AN
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
Description
D0–D7
CP
Data Inputs
Clock Pulse Input 3-STATE
OE Output Enable Input 3-STATE
O0–O7
Outputs
© 1999 Fairchild Semiconductor Corporation DS500030.prf
www.fairchildsemi.com


74VHCT374 데이터시트, 핀배열, 회로
Functional Description
Truth Table
The VHCT374A consists of eight edge-triggered flip-flops
with individual D-type inputs and 3-STATE true outputs.
Inputs
Outputs
The buffered clock and buffered Output Enable are com-
mon to all flip-flops. The eight flip-flops will store the state
of their individual D inputs that meet the setup and hold
time requirements on the LOW-to-HIGH Clock (CP) transi-
tion. With the Output Enable (OE) LOW, the contents of the
eight flip-flops are available at the outputs. When the OE is
Dn CP OE
HL
L L
XXH
On
H
L
Z
HIGH, the outputs go to the high impedance state. Opera-
tion of the OE input does not affect the state of the flip-
flops.
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
= LOW-to-HIGH Transition
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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74VHCT374 flip-flop

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