파트넘버.co.kr 74LVCH162374ADGG 데이터시트 PDF


74LVCH162374ADGG 반도체 회로 부품 판매점

16-bit edge triggered D-type flip-flop with 30 ohmseries termination resistors; 5 V input/output tolerant; 3-state



NXP Semiconductors 로고
NXP Semiconductors
74LVCH162374ADGG 데이터시트, 핀배열, 회로
INTEGRATED CIRCUITS
DATA SHEET
74LVC162374A; 74LVCH162374A
16-bit edge triggered D-type
flip-flop with 30 series termination
resistors; 5 V input/output tolerant;
3-state
Product specification
File under Integrated Circuits, IC24
1999 Aug 05


74LVCH162374ADGG 데이터시트, 핀배열, 회로
Philips Semiconductors
Product specification
16-bit edge triggered D-type flip-flop with 30 series 74LVC162374A;
termination resistors; 5 V input/output tolerant; 3-state 74LVCH162374A
FEATURES
ESD protection:
HBM EIA/JESD22-A114-A
exceeds 2000 V
MM EIA/JESD22-A115-A
exceeds 200 V
5 V tolerant input/output for
interfacing with 5 V logic
Wide supply voltage range of
1.2 to 3.6 V
Complies with JEDEC standard
no. 8-1A
CMOS low power consumption
MULTIBYTEflow-through
standard pin-out architecture
Low inductance multiple power and
ground pins for minimum noise and
ground bounce
Direct interface with TTL levels
All data inputs have bus hold
(74LVCH162374A only)
High impedance when VCC = 0
Power off disables outputs,
permitting live insertion.
DESCRIPTION
The 74LVC(H)162374A is a 16-bit edge triggered flip-flop featuring separate
D-type inputs for each flip-flop and 3-state outputs for bus oriented applications.
The 74LVC162374A consists of 2 sections of eight edge-triggered flip-flops.
A clock (CP) input and an output enable (OE) are provided for each octal.
Inputs can be driven from either 3.3 or 5 V devices. In 3-state operation,
outputs can handle 5 V. These features allow the use of these devices in a
mixed 3.3 and 5 V environment.
The flip-flops will store the state of their individual D-inputs that meet the set-up
and hold time requirements on the LOW-to-HIGH CP transition.
When OE is LOW, the contents of the flip-flops are available at the outputs.
When OE is HIGH, the outputs go to the high-impedance OFF-state.
Operation of the OE input does not affect the state of the flip-flops.
The 74LVCH162374A bus hold data inputs eliminates the need for external pull
up resistors to hold unused inputs.
The 74LVC(H)162374A is designed with 30 series termination resistors in
both HIGH and LOW output stages to reduce line noise.
FUNCTION TABLE
See note 1.
OPERATION MODES
Load and read register
Latch register and disable outputs
nOE
L
L
H
H
INPUTS
nCP
nDn
l
h
l
h
Note
1. H = HIGH voltage level;
h = HIGH voltage level one set-up time prior to the HIGH-to-LOW LE transition;
L = LOW voltage level;
l = LOW voltage level one set-up time prior to the HIGH-to-LOW LE transition;
Z = high-impedance OFF-state;
= LOW-to-HIGH CP transition.
INTERNAL
FLIP-FLOPS
L
H
L
H
OUTPUTS
Q0 to Q7
L
H
Z
Z
1999 Aug 05
2




PDF 파일 내의 페이지 : 총 16 페이지

제조업체: NXP Semiconductors

( nxp )

74LVCH162374ADGG flip-flop

데이터시트 다운로드
:

[ 74LVCH162374ADGG.PDF ]

[ 74LVCH162374ADGG 다른 제조사 검색 ]




국내 전력반도체 판매점


상호 : 아이지 인터내셔날

전화번호 : 051-319-2877

[ 홈페이지 ]

IGBT, TR 모듈, SCR, 다이오드모듈, 각종 전력 휴즈

( IYXS, Powerex, Toshiba, Fuji, Bussmann, Eaton )

전력반도체 문의 : 010-3582-2743



일반적인 전자부품 판매점


디바이스마트

IC114

엘레파츠

ICbanQ

Mouser Electronics

DigiKey Electronics

Element14


관련 데이터시트


74LVCH162374ADGG

16-bit edge triggered D-type flip-flop with 30 ohmseries termination resistors; 5 V input/output tolerant; 3-state - NXP Semiconductors