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Low Voltage Octal D-Type Flip-Flop with 5V Tolerant Inputs and Outputs



Fairchild Semiconductor 로고
Fairchild Semiconductor
74LCX574MSA 데이터시트, 핀배열, 회로
March 1995
Revised April 1999
74LCX574
Low Voltage Octal D-Type Flip-Flop with 5V Tolerant
Inputs and Outputs
General Description
The LCX574 is a high-speed, low power octal flip-flop with
a buffered common Clock (CP) and a buffered common
Output Enable (OE). The information presented to the D
inputs is stored in the flip-flops on the LOW-to-HIGH Clock
(CP) transition.
The LCX574 is functionally identical to the LCX374 except
for the pinouts.
The LCX574 is designed for low voltage (2.5V or 3.3V) VCC
applications with capability of interfacing to a 5V signal
environment. The LCX574 is fabricated with an advanced
CMOS technology to achieve high speed operation while
maintaining CMOS low power dissipation.
Features
s 5V tolerant inputs and outputs
s 2.3V–3.6V VCC specifications provided
s 7.5 ns tPD max (VCC = 3.3V), 10 µA ICC max
s Power down high impedance inputs and outputs
s Supports live insertion/withdrawal (Note 1)
s ±24 mA output drive (VCC = 3.0V)
s Implements patented noise/EMI reduction circuitry
s Latch-up performance exceeds 500 mA
s ESD performance:
Human body model > 2000V
Machine model > 200V
Note 1: To Ensure the high-Impedance state during power up or down, OE
should be tied to VCC through a pull-up resistor: the minimum value or the
resistor is determined by the current-sourcing capability of the driver.
Ordering Code:
Order Number
74LCX574WM
74LCX574SJ
74LCX574MSA
Package Number
Package Description
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MSA20
20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
74LCX574MTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
Pin Descriptions
Pin Names
Description
D0–D7
CP
Data Inputs
Clock Pulse Input
OE 3-STATE Output Enable Input
O0–O7
3-STATE Outputs
© 1999 Fairchild Semiconductor Corporation DS012406.prf
www.fairchildsemi.com


74LCX574MSA 데이터시트, 핀배열, 회로
Functional Description
The LCX574 consists of eight edge-triggered flip-flops with
individual D-type inputs and 3-STATE true outputs. The
buffered clock and buffered Output Enable are common to
all flip-flops. The eight flip-flops will store the state of their
individual D inputs that meet the setup and hold time
requirements on the LOW-to-HIGH Clock (CP) transition.
With the Output Enable (OE) LOW, the contents of the
eight flip-flops are available at the outputs. When OE is
HIGH, the outputs go to the high impedance state. Opera-
tion of the OE input does not affect the state of the flip-
flops.
Truth Table
Inputs
OE CP D
H HL
H HH
H L
H H
L L
L H
L HL
L HH
Internal
Q
NC
NC
L
H
L
H
NC
NC
Outputs
Function
On
Z Hold
Z Hold
Z Load
Z Load
L Data Available
H Data Available
NC No Change in Data
NC No Change in Data
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
= LOW-to-HIGH Transition
NC = No Change
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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74LCX574MSA flip-flop

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Low Voltage Octal D-Type Flip-Flop with 5V Tolerant Inputs and Outputs - Fairchild Semiconductor