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74AC174PC 반도체 회로 부품 판매점

Hex D-Type Flip-Flop with Master Reset



Fairchild Semiconductor 로고
Fairchild Semiconductor
74AC174PC 데이터시트, 핀배열, 회로
November 1988
Revised November 1999
74AC174 74ACT174
Hex D-Type Flip-Flop with Master Reset
General Description
The AC/ACT174 is a high-speed hex D-type flip-flop. The
device is used primarily as a 6-bit edge-triggered storage
register. The information on the D inputs is transferred to
storage during the LOW-to-HIGH clock transition. The
device has a Master Reset to simultaneously clear all flip-
flops.
Features
s ICC reduced by 50%
s Outputs source/sink 24 mA
s ACT174 has TTL-compatible inputs
Ordering Code:
Order Number Package Number
Package Description
74AC174SC
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150Narrow Body
74AC174SJ
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74AC174PC
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300Wide
74ACT174SC
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150Narrow
74ACT174SJ
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74ACT174MTC
MTC16
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74ACT174PC
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300Wide
Device also available in Tape and Reel. Specify by appending suffix lettwerwwX.D” taotatShheeoertd4Uer.cinogmcode.
Logic Symbols
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
D0D5
CP
MR
Q0Q5
Description
Data Inputs
Clock Pulse Input
Master Reset Input
Outputs
FACTis a trademark of Fairchild Semiconductor Corporation.
© 1999 Fairchild Semiconductor Corporation DS009935
www.fairchildsemi.com


74AC174PC 데이터시트, 핀배열, 회로
Functional Description
The AC/ACT174 consists of six edge-triggered D-type flip-
flops with individual D inputs and Q outputs. The Clock
(CP) and Master Reset (MR) are common to all flip-flops.
Each D inputs state is transferred to the corresponding flip-
flops output following the LOW-to-HIGH Clock (CP) transi-
tion. A LOW input to the Master Reset (MR) will force all
outputs LOW independent of Clock or Data inputs. The AC/
ACT174 is useful for applications where the true output
only is required and the Clock and Master Reset are com-
mon to all storage elements.
Logic Diagram
Truth Table
Inputs
MR CP
LX
H
H
HL
H = HIGH Voltage Level
L = LOW Voltage Level
= LOW-to-HIGH Transition
X = Immaterial
D
X
H
L
X
Output
Q
L
H
L
Q
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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74AC174PC flip-flop

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74AC174PC

Hex D-Type Flip-Flop with Master Reset - Fairchild Semiconductor