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74ABT574ADB 반도체 회로 부품 판매점

Octal D-type flip-flop 3-State



NXP Semiconductors 로고
NXP Semiconductors
74ABT574ADB 데이터시트, 핀배열, 회로
INTEGRATED CIRCUITS
74ABT574A
Octal D-type flip-flop (3-State)
Product specification
IC23 Data Handbook
1995 May 22
Philips
Semiconductors


74ABT574ADB 데이터시트, 핀배열, 회로
Philips Semiconductors
Octal D-type flip-flop (3-State)
Product specification
74ABT574A
FEATURES
74ABT574A is flow-through pinout version of 74ABT374
Inputs and outputs on opposite side of package allow easy
interface to microprocessors
3-State outputs for bus interfacing
Power-up 3-State
Power-up reset
Common output enable
Latch-up protection exceeds 500mA per Jedec Std 17
ESD protection exceeds 2000 V per MIL STD 883 Method 3015
and 200 V per Machine Model
Live insertion/extraction permitted.
DESCRIPTION
The 74ABT574A high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
The 74ABT574A is an 8-bit, edge triggered register coupled to eight
3-State output buffers. The two sections of the device are controlled
independently by the clock (CP) and Output Enable (OE) control
gates. The state of each D input (one set-up time before the
Low-to-High clock transition) is transferred to the corresponding
flip-flop’s Q output.
When OE is Low, the stored data appears at the outputs. When OE
is High, the outputs are in the High-impedance “off” state, which
means they will neither drive nor load the bus.
The 3-State output buffers are designed to drive heavily loaded
3-State buses, MOS memories, or MOS microprocessors. The
active-Low Output Enable (OE) controls all eight 3-State buffers
independent of the clock operation.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
tPLH
tPHL
CIN
COUT
ICCZ
Propagation delay
CP to Qn
Input capacitance
Output capacitance
Total supply current
CONDITIONS
Tamb = 25°C; GND = 0V
CL = 50pF; VCC = 5V
VI = 0V or VCC
Outputs disabled; VO = 0V or VCC
Outputs disabled; VCC =5.5V
TYPICAL
3.0
3.4
3
6
100
UNIT
ns
pF
pF
µA
ORDERING INFORMATION
PACKAGES
20-Pin Plastic DIP
20-Pin plastic SO
20-Pin Plastic SSOP Type II
20-Pin Plastic TSSOP Type I
TEMPERATURE RANGE OUTSIDE NORTH AMERICA
–40°C to +85°C
74ABT574A N
–40°C to +85°C
74ABT574A D
–40°C to +85°C
74ABT574A DB
–40°C to +85°C
74ABT574A PW
NORTH AMERICA
74ABT574A N
74ABT574A D
74ABT574A DB
7ABT574APW DH
DWG NUMBER
SOT146-1
SOT163-1
SOT339-1
SOT360-1
PIN CONFIGURATION
OE 1
D0 2
D1 3
D2 4
D3 5
D4 6
D5 7
D6 8
D7 9
GND 10
20 VCC
19 Q0
18 Q1
17 Q2
16 Q3
15 Q4
14 Q5
13 Q6
12 Q7
11 CP
PIN DESCRIPTION
PIN
NUMBER
SYMBOL
FUNCTION
1
2, 3, 4, 5,
6, 7, 8, 9
19, 18, 17,
16, 15, 14,
13, 12
OE
D0-D7
Output enable input (active-Low)
Data inputs
Q0-Q7 Data outputs
11 CP Clock pulse input (active rising edge)
10 GND Ground (0V)
20 VCC Positive supply voltage
SA00103
1995 May 22
2 853-1509 15261




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74ABT574ADB flip-flop

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74ABT574AD

Octal D-type flip-flop 3-State - NXP Semiconductors



74ABT574ADB

Octal D-type flip-flop 3-State - NXP Semiconductors