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PDF 74F175AN Data sheet ( Hoja de datos )
| Número de pieza | 74F175AN | |
| Descripción | Quad D flip-flop | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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INTEGRATED CIRCUITS
74F175*, 74F175A
Quad D flip-flop
* Discontinued part. Please see the Discontinued Product List in Section 1, page 21.
Product specification
IC15 Data Handbook
1996 Mar 12
Philips
Semiconductors
1 page  
Philips Semiconductors
Quad D flip-flop
Product specification
74F175A
AC SETUP REQUIREMENTS FOR 74F175A
SYMBOL
PARAMETER
TEST
CONDITION
ts(H)
ts(L)
th(H)
th(L)
tw(H)
tw(L)
tw(L)
tREC
Setup time, High or Low
Dn to CP
Hold time, High or Low
Dn to CP
CP Pulse width
High or Low
MR Pulse width
Low
Recovery time
MR to CP
Waveform 2
Waveform 2
Waveform 1
Waveform 3
Waveform 3
Tamb = 25°C
VCC = +5V
CL = 50pF,
RL = 500Ω
MIN TYP MAX
3.0
3.0
0.0
0.0
3.0
4.0
3.5
4.0
LIMITS
Tamb = 0°C to +70°C
VCC = +5.0V ± 10%
CL = 50pF,
RL = 500Ω
MIN MAX
3.5
3.5
0.0
0.0
3.5
5.0
Tamb = *40°C to +85°C
VCC = +5.0V ± 10%
CL = 50pF,
RL = 500Ω
MIN MAX
4.0
4.0
0.0
0.0
4.0
5.5
UNIT
ns
ns
ns
3.5 4.0 ns
4.5 5.0 ns
AC WAVEFORMS
For all waveforms, VM = 1.3V.
1/fmax
CP VM
tw(H)
tPHL
VM
tw(L)
Qn VM
tPLH
VM
tPLH
VM
tPHL
Qn VM
VM
SF00722
Waveform 1. Propagation delay for clock input to output, clock
pulse width, and maximum clock frequency
MR VM VM
tw(L)
tREC
CP VM
tPHL
Qn VM
tPLH
Qn VM
SF00723
Waveform 3. Master Reset pulse width, Master Reset to output
delay and Master Reset to Clock recovery time
Dn VM VM
ts(H) th(H)
CP VM
VM VM
ts(L) th(L)
VM
SF00191
Waveform 2. Data setup time and hold times
1996 Mar 12
5
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet 74F175AN.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| 74F175A | Quad D flip-flop | NXP Semiconductors |
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| 74F175AN | Quad D flip-flop | NXP Semiconductors |
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