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Número de pieza | 74ALVCH16823 | |
Descripción | 18-bit bus-interface D-type flip-flop with reset and enable 3-State | |
Fabricantes | NXP Semiconductors | |
Logotipo | ||
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74ALVCH16823
18-bit bus-interface D-type flip-flop
with reset and enable (3-State)
Product specification
IC24 Data Handbook
1998 Jul 29
Philips
Semiconductors
1 page Philips Semiconductors
18-bit D-type flip-flop (3-State)
Product specification
74ALVCH16823
FUNCTION TABLE
nOE
nMR
INPUTS
nCE
nCP
nDx
OUTPUT
nQx
LL X X X
L
LH L ↑ h
H
LH L ↑
l
L
LH L L X
Q0
LH H X X
Q0
HX X X X
Z
H = HIGH voltage level
h = HIGH voltage level one set-up time prior to the Low-to-High clock transition
L = LOW voltage level
l = LOW voltage level one set-up time prior to the Low-to-High clock transition
X = Don’t care
Z = HIGH impedance “off” state
↑ = LOW to High clock transition
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
CONDITIONS
VCC
VCC
VI
VO
Tamb
tr, tf
DC supply voltage 2.5V range (for max. speed
performance @ 30 pF output load)
DC supply voltage 3.3V range (for max. speed
performance @ 50 pF output load)
DC supply voltage (for low-voltage applications)
DC Input voltage range
DC output voltage range
Operating free-air temperature range
Input rise and fall times
for data input pins
for control pins
VCC = 2.3 to 3.0V
VCC = 3.0 to 3.6V
OPERATING MODES
Clear
Load and read data
Hold
Disable outputs
LIMITS
MIN MAX
2.3 2.7
3.0 3.6
1.2 3.6
0 VCC
0 5.5
0 VCC
–40 +85
0 20
0 10
UNIT
V
V
V
V
V
°C
ns/V
ABSOLUTE MAXIMUM RATINGS
In accordance with the Absolute Maximum Rating System (IEC 134). Voltages are referenced to GND (ground = 0V).
SYMBOL
PARAMETER
CONDITIONS
RATING
VCC DC supply voltage
IIK DC input diode current
VI DC input voltage
IOK DC output diode current
VI t0
For control pins1
For data inputs1
VO uVCC or VO t 0
–0.5 to +4.6
–50
–0.5 to +5.5
–0.5 to VCC +0.5
"50
VO DC output voltage
Note 1
–0.5 to VCC +0.5
IO
DC output source or sink current
VO = 0 to VCC
"50
IGND, ICC
Tstg
PTOT
DC VCC or GND current
Storage temperature range
Power dissipation per package
–plastic medium-shrink (SSOP)
–plastic thin-medium-shrink (TSSOP)
For temperature range: –40 to +125 °C
above +55°C derate linearly with 11.3 mW/K
above +55°C derate linearly with 8 mW/K
"100
–65 to +150
850
600
NOTE:
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
UNIT
V
mA
V
mA
V
mA
mA
°C
mW
1998 Jul 29
5
5 Page Philips Semiconductors
18-bit bus-interface D-type flip-flop
with reset and enable (3-State)
NOTES
Product specification
74ALVCH16823
1998 Jul 29
11
11 Page |
Páginas | Total 12 Páginas | |
PDF Descargar | [ Datasheet 74ALVCH16823.PDF ] |
Número de pieza | Descripción | Fabricantes |
74ALVCH16821 | 20-bit bus-interface D-type flip-flop; positive-edge trigger 3-State | NXP Semiconductors |
74ALVCH16821DGG | 20-bit bus-interface D-type flip-flop; positive-edge trigger 3-State | NXP Semiconductors |
74ALVCH16821DL | 20-bit bus-interface D-type flip-flop; positive-edge trigger 3-State | NXP Semiconductors |
74ALVCH16823 | 18-bit bus-interface D-type flip-flop with reset and enable 3-State | NXP Semiconductors |
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