파트넘버.co.kr 74ACT823SC 데이터시트 PDF


74ACT823SC 반도체 회로 부품 판매점

9-Bit D-Type Flip-Flop



Fairchild Semiconductor 로고
Fairchild Semiconductor
74ACT823SC 데이터시트, 핀배열, 회로
July 1988
Revised September 2000
74ACT823
9-Bit D-Type Flip-Flop
General Description
The ACT823 is a 9-bit buffered register. It features Clock
Enable and Clear which are ideal for parity bus interfacing
in high performance microprogramming systems. The
ACT823 offers noninverting outputs.
Features
s Outputs source/sink 24 mA
s 3-STATE outputs for bus interfacing
s Inputs and outputs are on opposite sides
s TTL compatible inputs
Ordering Code:
Order Number Package Number
Package Description
74ACT823SC
M24B
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74ACT823MTC
MTC24
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74ACT823SPC
N24C
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. (SPC not available in Tape and Reel.)
Logic Symbols
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
D0D8
O0O8
OE
CLR
CP
EN
Description
Data Inputs
Data Outputs
Output Enable
Clear
Clock Input
Clock Enable
FACTis a trademark of Fairchild Semiconductor Corporation.
© 2000 Fairchild Semiconductor Corporation DS009894
www.fairchildsemi.com


74ACT823SC 데이터시트, 핀배열, 회로
Functional Description
The ACT823 consists of nine D-type edge-triggered flip-
flops. These have 3-STATE outputs for bus systems orga-
nized with inputs and outputs on opposite sides. The buff-
ered clock (CP) and buffered Output Enable (OE) are
common to all flip-flops. The flip-flops will store the state of
their individual D-type inputs that meet the setup and hold
time requirements on the LOW-to-HIGH CP transition. With
OE LOW, the contents of the flip-flops are available at the
outputs. When OE is HIGH, the outputs go to the high
impedance state. Operation of the OE input does not affect
the state of the flip-flops. In addition to the Clock and Out-
Function Table
put Enable pins, there are Clear (CLR) and Clock Enable
(EN) pins. These devices are ideal for parity bus interfacing
in high performance systems.
When CLR is LOW and OE is LOW, the outputs are LOW.
When CLR is HIGH, data can be entered into the flip-flops.
When EN is LOW, data on the inputs is transferred to the
outputs on the LOW-to-HIGH clock transition. When the
EN is HIGH, the outputs do not change state, regardless of
the data or clock input transitions.
Inputs
OE
H
H
H
L
H
L
H
H
L
L
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
= LOW-to-HIGH Transition
NC = No Change
CLR
X
X
L
L
H
H
H
H
H
H
EN
L
L
X
X
H
H
L
L
L
L
CP


X
X
X
X




Logic Diagram
D
L
H
X
X
X
X
L
H
L
H
Internal
Q
L
H
L
L
NC
NC
L
H
L
H
Output
O
Z
Z
Z
L
Z
NC
Z
Z
L
H
Function
High Z
High Z
Clear
Clear
Hold
Hold
Load
Load
Load
Load
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
www.fairchildsemi.com
2




PDF 파일 내의 페이지 : 총 7 페이지

제조업체: Fairchild Semiconductor

( fairchild )

74ACT823SC flip-flop

데이터시트 다운로드
:

[ 74ACT823SC.PDF ]

[ 74ACT823SC 다른 제조사 검색 ]




국내 전력반도체 판매점


상호 : 아이지 인터내셔날

전화번호 : 051-319-2877

[ 홈페이지 ]

IGBT, TR 모듈, SCR, 다이오드모듈, 각종 전력 휴즈

( IYXS, Powerex, Toshiba, Fuji, Bussmann, Eaton )

전력반도체 문의 : 010-3582-2743



일반적인 전자부품 판매점


디바이스마트

IC114

엘레파츠

ICbanQ

Mouser Electronics

DigiKey Electronics

Element14


관련 데이터시트


74ACT823SC

9-Bit D-Type Flip-Flop - Fairchild Semiconductor



74ACT823SPC

9-Bit D-Type Flip-Flop - Fairchild Semiconductor