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Zarlink Semiconductor |
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THIS DOCUMENT IS FOR MAINTENANCE
PURPOSES ONLY AND IS NOT
RECOMMENDED FOR NEW DESIGNS
MV3506/7/8
ADVANCE INFORMATION
DS3133-2.1
MV3506 A-LAW FILTER/CODEC
MV3507 µ-LAW FILTER/CODEC
MV3508 A-LAW FILTER/CODEC WITH OPTIONAL SQUELCH
These devices are silicon gate CMOS Companding
Encoder/Decoder integrated circuits designed to implement
the per channel voice frequency Codecs used in PCM
systems. They contain the band-limiting filters and the analog
to digital conversion circuits that conform to the desired
transfer characteristic. The MV3506 and MV3508 provide the
European A-Law companding and the MV3507 provides the
North American µ-Law companding characteristic. The
MV3508 has programmable squelch circuitry to reduce idle
channel noise.
These circuits provide the interface between the analog
signals of the subscriber loop and digital signals of the PCM
highway in a digital telephone switching system. The devices
operate from dual power supplies of ±5V.
FEATURES
s Low Power CMOS 80mW (Operating) 10mW (Standby)
s Meets or Exceeds AT & T3, and CCITT G.711, G.712 and
G.733 Specifications
s Input Analog Filter Eliminates Need for External Anti-
aliasing Prefilter
s Uncommitted Input and Output Op. Amps for
Programming Gain
s Output Op. Amp Provides ±3.1V into a 1200 Ohms Load
or can be Switched Off for Reduced Power (70mW)
s Encoder has Dual-speed Auto-zero Loop for Fast
Acquisition on Power-up
s Low Absolute Group Delay = 410 microseconds at 1 kHz
TST/SE
CLK SEL
T SHIFT
SYS CLK
T STROBE
PCM OUT
D GND
CAZ
R SHIFT
R STROBE
PCM IN
1 22
2 21
3 20
4 19
5 MV3506/ 18
6 7/8 17
7 16
8 15
9 14
10 13
11 12
VDD
VOUT
OUT-
FLT OUT
PDB
VIN
IN-
IN+
CAZ GND
A GND
VSS
DG22
Figure 1: Pin connection - top view
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