|
NXP Semiconductors |
74AHC244-Q100;
74AHCT244-Q100
Octal buffer/line driver; 3-state
Rev. 1 — 9 July 2012
Product data sheet
1. General description
The 74AHC244-Q100; 74AHCT244-Q100 is a high-speed Si-gate CMOS device.
The 74AHC244-Q100; 74AHCT244-Q100 has octal non-inverting buffer/line drivers with
3-state outputs. The 3-state outputs are controlled by the output enable inputs (nOE). A
HIGH on nOE causes the outputs to assume a high-impedance OFF-state.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from 40 C to +85 C and from 40 C to +125 C
Balanced propagation delays
All inputs have a Schmitt trigger action
Inputs accept voltages higher than VCC
For 74AHC244-Q100 only: operates with CMOS input levels
For 74AHCT244-Q100 only: operates with TTL input levels
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pf, R = 0 )
Multiple package options
NXP Semiconductors
74AHC244-Q100; 74AHCT244-Q100
Octal buffer/line driver; 3-state
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
Description
Version
74AHC244D-Q100 40 C to +125 C SO20
74AHCT244D-Q100
plastic small outline package; 20 leads;
body width 7.5 mm
SOT163-1
74AHC244PW-Q100 40 C to +125 C TSSOP20 plastic thin shrink small outline package; 20 leads; SOT360-1
74AHCT244PW-Q100
body width 4.4 mm
74AHC244BQ-Q100 40 C to +125 C
74AHCT244BQ-Q100
DHVQFN20 plastic dual-in-line compatible thermal enhanced SOT764-1
very thin quad flat package; no leads; 20 terminals;
body 2.5 4.5 0.85 mm
4. Functional diagram
Fig 1. Functional diagram
1A0
2
1A1
4
1A2
6
1A3
8
1OE
1
2A0
17
2A1
15
2A2
13
2A3
11
2OE
19
1Y0
18
1Y1
16
1Y2
14
1Y3
12
2Y0
3
2Y1
5
2Y2
7
2Y3
9
mna170
74AHC_AHCT244_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 9 July 2012
© NXP B.V. 2012. All rights reserved.
2 of 17
|