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74HCT2G126GD 반도체 회로 부품 판매점

Dual buffer/line driver



NXP Semiconductors 로고
NXP Semiconductors
74HCT2G126GD 데이터시트, 핀배열, 회로
74HC2G126; 74HCT2G126
Dual buffer/line driver; 3-state
Rev. 5 — 18 December 2013
Product data sheet
1. General description
The 74HC2G126; 74HCT2G126 is a dual buffer/line driver with 3-state outputs controlled
by the output enable inputs (nOE). Inputs include clamp diodes. This enables the use of
current limiting resistors to interface inputs to voltages in excess of VCC.
2. Features and benefits
Wide operating voltage from 2.0 V to 6.0 V
Input levels:
For 74HC2G126: CMOS level
For 74HCT2G126: TTL level
Complies with JEDEC standard no. 7A
Symmetrical output impedance
High noise immunity
Low power dissipation
Balanced propagation delays
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from 40 C to +85 C and 40 C to +125 C
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
74HC2G126DP 40 C to +125 C TSSOP8
74HCT2G126DP
74HC2G126DC 40 C to +125 C VSSOP8
74HCT2G126DC
74HC2G126GD 40 C to +125 C XSON8
74HCT2G126GD
Description
plastic thin shrink small outline package; 8 leads;
body width 3 mm; lead length 0.5 mm
Version
SOT505-2
plastic very thin shrink small outline package; 8 leads; SOT765-1
body width 2.3 mm
plastic extremely thin small outline package; no leads; SOT996-2
8 terminals; body 3 2 0.5 mm


74HCT2G126GD 데이터시트, 핀배열, 회로
NXP Semiconductors
74HC2G126; 74HCT2G126
Dual buffer/line driver; 3-state
4. Marking
Table 2. Marking codes[1]
Type number
74HC2G126DP
74HCT2G126DP
74HC2G126DC
74HCT2G126DC
74HC2G126GD
74HCT2G126GD
Marking code
H26
T26
H26
T26
H26
T26
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
1A
2
1 1OE
2A
5
7 2OE
1Y
6
2Y
3
mna946
Fig 1. Logic symbol
2
1
1
EN1
5
7
6
3
mna947
Fig 2. IEC logic symbol
6. Pinning information
6.1 Pinning
AY
OE
mna127
Fig 3. Logic diagram (one driver)
74HC2G126
74HCT2G126
1OE 1
1A 2
2Y 3
GND 4
8 VCC
7 2OE
6 1Y
5 2A
001aad984
Fig 4. Pin configuration SOT505-2 (TSSOP8) and
SOT765-1 (VSSOP8)
74HC2G126
74HCT2G126
1OE 1
1A 2
8 VCC
7 2OE
2Y 3
6 1Y
GND 4
5 2A
001aak029
Transparent top view
Fig 5. Pin configuration SOT996-2 (XSON8)
74HC_HCT2G126
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 18 December 2013
© NXP B.V. 2013. All rights reserved.
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74HCT2G126GD driver

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Dual buffer/line driver - NXP Semiconductors