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PDF L6258 Data sheet ( Hoja de datos )
| Número de pieza | L6258 | |
| Descripción | PWM CONTROLLED - HIGH CURRENT DMOS UNIVERSAL MOTOR DRIVER | |
| Fabricantes | STMicroelectronics | |
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® L6258
PWM CONTROLLED - HIGH CURRENT
DMOS UNIVERSAL MOTOR DRIVER
PRELIMINARY DATA
ABLE TO DRIVE BOTH WINDINGS OF A BI-
POLAR STEPPER MOTOR OR TWO DC MO-
TORS
OUTPUT CURRENT UP TO 1.5A EACH
WINDING
WIDE VOLTAGE RANGE: 12V TO 45V
FOUR QUADRANT CURRENT CONTROL,
IDEAL FOR MICROSTEPPING AND DC MO-
TOR CONTROL
PRECISION PWM CONTROL
NO NEED FOR RECIRCULATION DIODES
TTL/CMOS COMPATIBLE INPUTS
CROSS CONDUCTION PROTECTION
THERMAL SHUTDOWN
DESCRIPTION
L6258 is a dual full bridge for motor control appli-
cations realized in BCD technology, with the ca-
pability of driving both windings of a bipolar step-
per motor or bidirectionally control two DC
motors.
L6258 and a few external components form a
PowerSO36
ORDERING NUMBER: L6258
complete control and drive circuit. It has high effi-
ciency phase shift chopping that allows a very low
current ripple at the lowest current control levels,
and makes this device ideal for steppers as well
as for DC motors.
The power stage is a dual DMOS full bridge capa-
ble of sustaining up to 45V, and includes the di-
odes for current recirculation.
The output current capability is 1.5A per winding
in continuous mode, with peak start-up current up
to 2A.
A thermal protection circuitry disables the outputs
if the chip temperature exceeds the safe limits.
BLOCK DIAGRAM
VCP1
VREF1
I3_1
I2_1
I1_1
I0_1
PH_1
VDD(5V)
VREF1
I3_2
I2_2
I1_2
I0_2
PH_2
TRI_CAP
CFREF
CP
CHARGE
PUMP
DAC
RC2
CC2
VCP2
EA_IN2
EA_OUT2
INPUT
&
SENSE
AMP
TRI_0
+
C
VR
ERROR
+ AMP
-
+
- TRI_180 C
-
VS
POWER
BRIDGE
1
VBOOT
CBOOT
OUT1A
OUT1B
SENSE1B
Rs
VR GEN
VR (VDD/2)
THERMAL
PROT.
DAC
INPUT
&
SENSE
AMP
TRIANGLE
GENERATOR
TRI_0
TRI_180
VR
ERROR
+ AMP
-
TRI_0
+
C
-
+
C
-
TRI_180
GND
EA_IN1
EA_OUT1
RC1
CC1
POWER
BRIDGE
2
SENSE1A
DISABLE
VS
OUT2A
OUT2B
SENSE2B
Rs
SENSE2A
D96IN430D
April 2000
1/18
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
1 page  
FUNCTIONAL DESCRIPTION
The circuit is intended to drive both windings of a
bipolar stepper motor or two DC motors.
The current control is generated through a switch
mode regulation.
With this system the direction and the amplitude
of the load current are depending on the relation
of phase and duty cycle between the two outputs
of the current control loop.
The L6258 power stage is composed by power
DMOS in bridge configuration as it is shown in fig-
ure 1, where the bridge outputs OUT_A and
OUT_B are driven to Vs with an high level at the
inputs IN_A and IN_B while are driven to ground
with a low level at the same inputs .
The zero current condition is obtained by driving
the two half bridge using signals IN_A and IN_B
with the same phase and 50% of duty cycle.
In this case the outputs of the two half bridges are
continuously switched between power supply (Vs)
and ground, but keeping the differential voltage
across the load equal to zero.
In figure 1A is shown the timing diagram of the
two outputs and the load current for this working
condition.
Following we consider positive the current flowing
into the load with a direction from OUT_A to
OUT_B, while we consider negative the current
flowing into load with a direction from OUT_B to
OUT_A.
Now just increasing the duty cycle of the IN_A
signal and decreasing the duty cycle of IN_B sig-
nal we drive positive current into the load.
In this way the two outputs are not in phase, and
the current can flow into the load trough the di-
agonal bridge formed by T1 and T4 when the out-
put OUT_A is driven to Vs and the output OUT_B
is driven to ground, while there will be a current
recirculation into the higher side of the bridge,
through T1 and T2, when both the outputs are at
Vs and a current recirculation into the lower side
of the bridge, through T3 and T4, when both the
L6258
outputs are connected to ground.
Since the voltage applied to the load for recircula-
tion is low, the resulting current discharge time
constant is higher than the current charging time
constant during the period in which the current
flows into the load through the diagonal bridge
formed by T1 and T4. In this way the load current
will be positive with an average amplitude de-
pending on the difference in duty cycle of the two
driving signals.
In figure 1B is shown the timing diagram in the
case of positive load current
On the contrary, if we want to drive negative cur-
rent into the load is necessary to decrease the
duty cycle of the IN_A signal and increase the
duty cycle of the IN_B signal. In this way we ob-
tain a phase shift between the two outputs such
to have current flowing into the diagonal bridge
formed by T2 and T3 when the output OUT_A is
driven to ground and output OUT_B is driven to
Vs, while we will have the same current recircula-
tion conditions of the previous case when both
the outputs are driven to Vs or to ground.
So, in this case the load current will be negative
with an average amplitude always depending by
the difference in duty cycle of the two driving sig-
nals.
In figure 1C is shown the timing diagram in the
case of negative load current .
Figure 2 shows the device block diagram of the
complete current control loop.
Reference Voltage
The voltage applied to VREF pin is the reference
for the internal DAC and, together with the sense
resistor value, defines the maximum current into
the motor winding according to the following rela-
tion:
IMAX
=
0.5 ⋅ VREF
RS
=
1
FI
⋅
VREF
RS
where Rs = sense resistor value
5/18
5 Page 
AloopdB = AxdB + BxdB
Ax|dB = ACpw|dB + ACload|dB
and
Bx|dB = ACerr|dB + ACsense|dB
this means that Ax|dB is the sum of the power am-
plifier and load blocks;
Ax|dB = (29,5) + (-31.4) = -1.9dB
The BODE analysis of the transfer function of Ax
is:
L6258
Bx
=
−
Verr_out
Vsense
=
−
Zc
Rb
In the case of no external RC network is used to
compensate the error amplifier, the typical open
loop transfer function of the error plus the sense
amplifier is something with a gain around 80dB
and a unity gain bandwidth at 400kHz. In this
case the situation of the total transfer function
Aloop, given by the sum of the AxdB and BxdB is :
The Bode plot of the Ax|dB function shows a DC
gain of -1.9dB and a pole at 163Hz.
It is clear now that (because of the negative gain
of the Ax function), Bx function must have an high
DC gain in order to increment the total open loop
gain increasing the bandwidth too.
Error Amplifier and Sense Amplifier
As explained before the gain of these two blocks
is :
BxdB = ACerrdB + ACsensedB
Being the voltage across the sense resistor the
input of the Bx block and the error amplifier volt-
age the output of the same, the voltage gain is
given by :
ib
=
Vsense
⋅
Gs
=
Vsense
⋅
1
Rb
Verr_out = -(ic ⋅ Zc) so ic = -(Verr_out ⋅ Z1c)
because ib = ic we have:
Vsense ⋅
1
Rb
=
-(Verr_out ⋅
Z1c)
The BODE diagram shows together the error am-
plifier open loop transfer function, the Ax function
and the resultant total Aloop given by the follow-
ing equation :
AloopdB = AxdB + BxdB
The total Aloop has an high DC gain of 78.1dB
with a bandwidth of 15KHz, but the problem in
this case is the stability of the system; in fact the
total Aloop cross the zero dB axis with a slope
of -40dB/decade.
Now it is necessary to compensate the error am-
plifier in order to obtain a total Aloop with an high
DC gain and a large bandwidth. Aloop must have
enough phase margin to guarantee the stability of
the system.
A method to reach the stability of the system, us-
ing the RC network showed in the block diagram,
is to cancel the load pole with the zero given by
the compensation of the error amplifier.
The transfer function of the Bx block with the
compensation on the error amplifier is :
Bx
=
−
Zc
Rb
=
−
Rc
−
j
2π ⋅
Rb
1
f⋅
Cc
In this case the Bx block has a DC gain equal to
the open loop and equal to zero at a frequency
given by the following formula :
Fzero
=
2π
⋅
1
Rc
⋅
Cc
11/18
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet L6258.PDF ] | |
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