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PDF 74AUP2G241 Data sheet ( Hoja de datos )

Número de pieza 74AUP2G241
Descripción Low-power Dual Buffer/line Driver
Fabricantes NXP Semiconductors 
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74AUP2G241
Low-power dual buffer/line driver; 3-state
Rev. 03 — 12 January 2009
Product data sheet
1. General description
The 74AUP2G241 provides a dual non-inverting buffer/line driver with 3-state outputs.
The 3-state outputs are controlled by the output enable inputs 1OE and 2OE. A HIGH
level at pin 1OE causes output 1Y to assume a high-impedance OFF-state. A LOW level
at pin 2OE causes output 2Y to assume a high-impedance OFF-state.
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall
times across the entire VCC range from 0.8 V to 3.6 V.
This device ensures a very low static and dynamic power consumption across the entire
VCC range from 0.8 V to 3.6 V.
This device is fully specified for partial power-down applications using IOFF.
The IOFF circuitry disables the output, preventing the damaging backflow current through
the device when it is powered down.
This device has an input-disable feature, which allows floating input signals. The input 1A
is disabled when the output enable input 1OE is HIGH. The input 2A is disabled when the
output enable input 2OE is LOW.
2. Features
I Wide supply voltage range from 0.8 V to 3.6 V
I High noise immunity
I Complies with JEDEC standards:
N JESD8-12 (0.8 V to 1.3 V)
N JESD8-11 (0.9 V to 1.65 V)
N JESD8-7 (1.2 V to 1.95 V)
N JESD8-5 (1.8 V to 2.7 V)
N JESD8-B (2.7 V to 3.6 V)
I ESD protection:
N HBM JESD22-A114E Class 3A exceeds 5000 V
N MM JESD22-A115-A exceeds 200 V
N CDM JESD22-C101C exceeds 1000 V
I Low static power consumption; ICC = 0.9 µA (maximum)
I Latch-up performance exceeds 100 mA per JESD 78 Class II
I Inputs accept voltages up to 3.6 V
I Low noise overshoot and undershoot < 10 % of VCC
I Input-disable feature allows floating input conditions
I IOFF circuitry provides partial Power-down mode operation

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74AUP2G241 pdf
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74AUP2G241
Low-power dual buffer/line driver; 3-state
10. Static characteristics
Table 7. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min Typ
Tamb = 25 °C
VIH HIGH-level input voltage
VCC = 0.8 V
VCC = 0.9 V to 1.95 V
0.70 × VCC -
0.65 × VCC -
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
1.6 -
2.0 -
VIL
LOW-level input voltage
VCC = 0.8 V
VCC = 0.9 V to 1.95 V
--
--
VCC = 2.3 V to 2.7 V
--
VCC = 3.0 V to 3.6 V
--
VOH HIGH-level output voltage VI = VIH or VIL
IO = 20 µA; VCC = 0.8 V to 3.6 V
IO = 1.1 mA; VCC = 1.1 V
IO = 1.7 mA; VCC = 1.4 V
IO = 1.9 mA; VCC = 1.65 V
IO = 2.3 mA; VCC = 2.3 V
IO = 3.1 mA; VCC = 2.3 V
IO = 2.7 mA; VCC = 3.0 V
IO = 4.0 mA; VCC = 3.0 V
VCC 0.1 -
0.75 × VCC -
1.11 -
1.32 -
2.05 -
1.9 -
2.72 -
2.6 -
VOL LOW-level output voltage VI = VIH or VIL
IO = 20 µA; VCC = 0.8 V to 3.6 V
-
-
IO = 1.1 mA; VCC = 1.1 V
--
IO = 1.7 mA; VCC = 1.4 V
IO = 1.9 mA; VCC = 1.65 V
--
--
IO = 2.3 mA; VCC = 2.3 V
IO = 3.1 mA; VCC = 2.3 V
--
--
IO = 2.7 mA; VCC = 3.0 V
--
IO = 4.0 mA; VCC = 3.0 V
--
II
input leakage current
VI = GND to 3.6 V; VCC = 0 V to 3.6 V
-
-
IOZ OFF-state output current VI = VIH or VIL; VO = 0 V to 3.6 V;
VCC = 0 V to 3.6 V
-
-
IOFF
IOFF
power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V
additional power-off leakage VI or VO = 0 V to 3.6 V;
current
VCC = 0 V to 0.2 V
-
-
-
-
ICC supply current
VI = GND or VCC; IO = 0 A;
VCC = 0.8 V to 3.6 V
--
Max Unit
-V
-V
-V
-V
0.30 × VCC V
0.35 × VCC V
0.7 V
0.9 V
-V
-V
-V
-V
-V
-V
-V
-V
0.1
0.3 × VCC
0.31
0.31
0.31
0.44
0.31
0.44
±0.1
±0.1
V
V
V
V
V
V
V
V
µA
µA
±0.2 µA
±0.2 µA
0.5 µA
74AUP2G241_3
Product data sheet
Rev. 03 — 12 January 2009
© NXP B.V. 2009. All rights reserved.
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74AUP2G241
Low-power dual buffer/line driver; 3-state
Table 8. Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 10.
Symbol Parameter
Conditions
25 °C
Min Typ[1] Max
CL = 15 pF
tpd propagation delay nA to nY; see Figure 7
VCC = 0.8 V
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
ten enable time
VCC = 3.0 V to 3.6 V
1OE to 1Y; see Figure 8
VCC = 0.8 V
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
2OE to 2Y; see Figure 9
VCC = 0.8 V
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
tdis disable time
1OE to 1Y; see Figure 8
VCC = 0.8 V
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
2OE to 2Y; see Figure 9
VCC = 0.8 V
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
[2]
-
3.6
3.0
2.2
2.0
2.0
[3]
-
4.0
3.0
2.3
2.1
2.0
[3]
-
3.6
3.0
2.1
1.8
1.6
[4]
-
4.3
3.0
3.0
2.1
2.9
[4]
-
4.3
3.0
3.1
2.4
3.2
27.4 -
7.2 14.1
5.1 8.1
4.3 6.3
3.7 4.9
3.5 4.4
77.5 -
7.7 15.2
5.3 8.4
4.4 6.5
3.6 5.0
3.5 4.5
79.2 -
7.8 15.8
5.4 8.8
4.3 6.7
3.4 4.8
3.1 4.3
60.8 -
6.5 9.2
5.0 6.5
5.3 6.6
3.8 4.9
5.0 6.2
14.9 -
6.4 8.5
5.0 6.6
5.4 6.6
4.0 5.0
5.3 6.2
40 °C to +125 °C Unit
Min Max Max
(85 °C) (125 °C)
--
3.3 15.8
2.5 9.8
2.0 7.9
1.8 6.0
1.8 5.4
- ns
17.5 ns
10.9 ns
8.8 ns
6.7 ns
6.1 ns
--
3.7 17.6
2.5 9.8
2.1 7.7
2.0 6.1
1.9 4.9
- ns
19.6 ns
10.7 ns
8.5 ns
6.8 ns
5.5 ns
--
3.3 17.1
2.9 9.4
2.0 7.3
1.7 5.2
1.5 4.5
- ns
17.1 ns
9.7 ns
7.7 ns
5.6 ns
4.7 ns
--
3.7 10.3
2.5 7.4
2.1 7.4
2.0 5.1
1.9 6.6
- ns
11.6 ns
8.4 ns
8.9 ns
6.4 ns
7.4 ns
--
3.7 9.3
2.5 6.9
2.0 7.4
1.7 5.1
1.5 6.7
- ns
9.4 ns
7.0 ns
7.5 ns
5.5 ns
6.9 ns
74AUP2G241_3
Product data sheet
Rev. 03 — 12 January 2009
© NXP B.V. 2009. All rights reserved.
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