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PDF 74AHCT2G126 Data sheet ( Hoja de datos )
| Número de pieza | 74AHCT2G126 | |
| Descripción | Dual buffer/line driver | |
| Fabricantes | NXP Semiconductors | |
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74AHC2G126; 74AHCT2G126
Dual buffer/line driver; 3-state
Rev. 7 — 6 May 2013
Product data sheet
1. General description
The 74AHC2G126 and 74AHCT2G126 are high-speed Si-gate CMOS devices. They
provide a dual non-inverting buffer/line driver with 3-state output. The 3-state output is
controlled by the output enable input (nOE). A LOW at nOE causes the output to assume
a high-impedance OFF-state.
The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V.
The AHCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V.
2. Features and benefits
Symmetrical output impedance
High noise immunity
Low power dissipation
Balanced propagation delays
Multiple package options
ESD protection:
HBM JESD22-A114E: exceeds 2000 V
MM JESD22-A115-A: exceeds 200 V
CDM JESD22-C101C: exceeds 1000 V
Specified from 40 C to +125 C
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name Description
74AHC2G126DP
74AHCT2G126DP
40 C to +125 C TSSOP8 plastic thin shrink small outline package; 8 leads;
body width 3 mm; lead length 0.5 mm
74AHC2G126DC
74AHCT2G126DC
40 C to +125 C VSSOP8 plastic very thin shrink small outline package;
8 leads; body width 2.3 mm
74AHC2G126GD
74AHCT2G126GD
40 C to +125 C XSON8 plastic extremely thin small outline package; no
leads; 8 terminals; body 3 2 0.5 mm
Version
SOT505-2
SOT765-1
SOT996-2
1 page  
NXP Semiconductors
74AHC2G126; 74AHCT2G126
Dual buffer/line driver; 3-state
Table 7. Static characteristics …continued
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions
CI input
capacitance
74AHCT2G126
VIH HIGH-level VCC = 4.5 V to 5.5 V
input voltage
VIL LOW-level VCC = 4.5 V to 5.5 V
input voltage
VOH
VOL
IOZ
II
ICC
ICC
CI
HIGH-level VI = VIH or VIL; VCC = 4.5 V
output voltage IO = 50 A
IO = 8.0 mA
LOW-level VI = VIH or VIL; VCC = 4.5 V
output voltage IO = 50 A
IO = 8.0 mA
OFF-state
VI = VCC or GND;
output current VCC = 5.5 V
input leakage VI = 5.5 V or GND;
current
VCC = 0 V to 5.5 V
supply current VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
additional
per input pin; VI = 3.4 V;
supply current other inputs at VCC or GND;
IO = 0 A; VCC = 5.5 V
input
capacitance
25 C
40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max Min
Max
- 1.5 10 - 10 - 10 pF
2.0 -
--
- 2.0
0.8 -
-
0.8
2.0 -
- 0.8
V
V
4.4 4.5 -
3.94 -
-
4.4 -
3.8 -
- 0 0.1 -
- - 0.36 -
- - 0.25 -
- - 0.1 -
- - 1.0 -
- - 1.35 -
0.1
0.44
2.5
1.0
10
1.5
4.4 -
3.70 -
- 0.1
- 0.55
- 10
- 2.0
- 40
- 1.5
V
V
V
V
A
A
A
mA
- 1.5 10 - 10 - 10 pF
11. Dynamic characteristics
Table 8. Dynamic characteristics
GND = 0 V; for test circuit see Figure 8.
Symbol Parameter Conditions
74AHC2G126
tpd propagation nA to nY; see Figure 6
delay
VCC = 3.0 V to 3.6 V
CL = 15 pF
CL = 50 pF
VCC = 4.5 V to 5.5 V
CL = 15 pF
CL = 50 pF
25 C
40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max Min Max
[1]
[2]
- 4.7 8.0 1.0 9.5 1.0 11.5 ns
- 6.6 11.5 1.0
13.0
1.0
14.5 ns
[3]
- 3.4 5.5 1.0
6.5
1.0
7.0 ns
- 4.8 7.5 1.0
8.5
1.0
9.5 ns
74AHC_AHCT2G126
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 6 May 2013
© NXP B.V. 2013. All rights reserved.
5 of 16
5 Page 
NXP Semiconductors
74AHC2G126; 74AHCT2G126
Dual buffer/line driver; 3-state
VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm
SOT765-1
D
y
Z
8
5
pin 1 index
E
c
HE
A A2
A1
1
e
4
bp w M
detail X
A
X
vM A
Q
(A3)
θ
Lp
L
0 2.5 5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c D(1) E(2) e
mm
1
0.15
0.00
0.85
0.60
0.12
0.27
0.17
0.23
0.08
2.1
1.9
2.4
2.2
0.5
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
HE
3.2
3.0
OUTLINE
VERSION
SOT765-1
IEC
REFERENCES
JEDEC
JEITA
MO-187
L Lp Q v w y Z(1) θ
0.4
0.40 0.21
0.15 0.19
0.2
0.13
0.1
0.4
0.1
8°
0°
EUROPEAN
PROJECTION
ISSUE DATE
02-06-07
Fig 10. Package outline SOT765-1 (VSSOP8)
74AHC_AHCT2G126
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 6 May 2013
© NXP B.V. 2013. All rights reserved.
11 of 16
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet 74AHCT2G126.PDF ] | |
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