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PDF JBT6K47-AS Data sheet ( Hoja de datos )
| Número de pieza | JBT6K47-AS | |
| Descripción | Source Driver | |
| Fabricantes | Toshiba Semiconductor | |
| Logotipo |  |
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www.DataSheet4U.com
JBT6K47-AS
Preliminary TOSHIBA CMOS Digital Integrated Circuits Silicon Monolithic
JBT6K47-AS
Source Driver for TFT LCD Panels
The JBT6K47-AS is a 64 gray-level, 240-channel-output source driver for TFT LCD panels. 6-bit digital input
enable to display colors using internal DA converter and five external power supplies. Also, JBT6K47-AS
incorporates power saving function to control recognition of the grayscale data input. When display performance is
not necessary, such as in a portable device, JBT6K47-AS ignores the grayscale input data.
Based on high-speed CMOS, the JBT6K47-AS offers both low power consumption and high-speed operation.
Features
· Grayscale data: 18-bit digital (3 outputs × 6 bits) parallel transfer method, selectable write direction
· Panel drive outputs: 240 outputs
· Grayscale levels: Capable of switching 2-grayscale mode and 16 grayscale/64 grayscale mode, and capable of
reference analog voltage inputs.
· High-speed operation: 5 MHz (max)
· Display mode: Normal display mode
· Power supply voltage: Digital power supply voltage (DVDD) .............2.5 to 3.6 V
Analog power supply voltage (AVDD)..............4.5 to 5.6 V
· Operating temperature: −20 to 75°C
· Package: Gold bump chip
· CMOS process
· Cascading multiple devices
1 2002-01-30
1 page  
www.DataSheet4U.com
PAD Coordinates (1)
No. Name X POINT Y POINT
1 AVDD -5994
2 AVDD -5909
3 AVDD -5824
4 AVSS -5679
5 AVSS -5589
6 AVSS -5499
7 AVSS -5409
8 AVSS -5319
9 DO/I -5171
10 DO/I
-5101
11 DO/I
-5031
12 ZIN5
-4911
13 ZIN5
-4841
14 ZIN5
-4771
15 ZIN4
-4621
16 ZIN4
-4551
17 ZIN4
-4481
18 ZIN3
-4361
19 ZIN3
-4291
20 ZIN3
-4221
21 ZIN2
-4071
22 ZIN2
-4001
23 ZIN2
-3931
24 ZIN1
-3811
25 ZIN1
-3741
26 ZIN1
-3671
27 ZIN0
-3521
28 ZIN0
-3451
29 ZIN0
-3381
30 U/D
-3261
31 U/D
-3191
32 U/D
-3121
33 LOAD -2971
34 LOAD -2901
35 LOAD -2831
36 CPH
-2711
37 CPH
-2641
38 CPH
-2571
39 /TEST1 -2404
40 /TEST1 -2344
41 DVDD -2221
42 DVDD -2136
43 DVDD -2051
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
No. Name X POINT Y POINT
44 /TEST2
45 /TEST2
46 DVSS
47 DVSS
48 DVSS
49 GS
50 GS
51 GS
52 POL
53 POL
54 V5
55 V5
56 V5
57 V4
58 V4
59 V4
60 V3
61 V3
62 V3
63 V2
64 V2
65 V2
66 V1
67 V1
68 V1
69 V0
70 V0
71 V0
72 MD
73 MD
74 DUMMY1
75 DUMMY2
76 DW
77 DW
78 DW
79 YIN5
80 YIN5
81 YIN5
82 YIN4
83 YIN4
84 YIN4
85 YIN3
86 YIN3
-1920
-1860
-1737
-1652
-1567
-1409
-1339
-1269
-1154
-1094
-873
-788
-703
-568
-483
-398
-233
-148
-63
72
157
242
407
492
577
712
797
882
1103
1163
1278
1348
1472
1542
1612
1732
1802
1872
2022
2092
2162
2282
2352
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
5
JBT6K47-AS
[Unit: mm]
No. Name X POINT Y POINT
87 YIN3
88 YIN2
89 YIN2
90 YIN2
91 YIN1
92 YIN1
93 YIN1
94 YIN0
95 YIN0
96 YIN0
97 XIN5
98 XIN5
99 XIN5
100 XIN4
101 XIN4
102 XIN4
103 XIN3
104 XIN3
105 XIN3
106 XIN2
107 XIN2
108 XIN2
109 XIN1
110 XIN1
111 XIN1
112 XIN0
113 XIN0
114 XIN0
115 DI/O
116 DI/O
117 DI/O
118 AVSS
119 AVSS
120 AVSS
121 AVSS
122 AVSS
123 AVDD
124 AVDD
125 AVDD
126 DUMMY3
127 DUMMY4
128 DUMMY5
129 DUMMY6
2422
2572
2642
2712
2832
2902
2972
3122
3192
3262
3382
3452
3522
3672
3742
3812
3932
4002
4072
4222
4292
4362
4482
4552
4622
4772
4842
4912
5032
5102
5172
5321
5411
5501
5591
5681
5824
5909
5994
6146
6146
6146
6146
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-996
-785
-685
-585
-485
2002-01-30
5 Page 
www.DataSheet4U.com
JBT6K47-AS
Device Operation
· Starting data transfer
A high input to the data transfer enable pin (DI/O or DO/I) is latched into the internal logic
synchronously with the rising edge of CPH, setting the device ready to transfer data. Data transfer
starts at the next rise of CPH.
Also, regardless how many rising edges are existed, DI/O or DO/I recognizes the first rising edge, and
the grayscale data is latched at the next rising edge.
· Data transfer method
The data is latched in from the grayscale bus to the sampling register synchronously with each rising
edge of CPH.
Grayscale data for three outputs are latched into the device simultaneously in one transfer.
Grayscale data are written as three outputs in parallel during one transfer. Data transfer completes
after 88 transfers. Then the device enters Standby mode.
Data written to the sampling register are the operation result of the grayscale data bus.
· Terminating data transfer
The data transfer enable pin (DO/I or DI/O) output goes high synchronously with the rising edge of
CPH one clock period before the last data is latched in.
The output from this pin can be connected directly as input to the data transfer enable pin (DI/O or
DO/I) of the next stage LCD driver. In this way, multiple devices can be easily cascaded to drive a large
screen.
· Panel drive output
After finishing transferring the grayscale data, the data is latched into the devise when Load is at
High level. The grayscale data of the sampling register is transferred to the load register, and the LCD
panel drive output is switched to the corresponded output to the grayscale data. The load signal
recognizes the data asynchronously with the CPH.
· The grayscale data bus
JBT6K47-AS is capable to determine the valid grayscale data bus by controlling MD pin and GS pin.
The relationship between the MD pin or the GS pin and the valid grayscale data bus is shown below.
Input Low or High for the invalid grayscale data bus.
MD GS
H
L
L
HL
Grayscale
Data Bus
6-bit mode
4-bit mode
1 bit mode
Colors
26 thousand
colors
4096 colors
8 colors
nIN5
Valid
Valid Grayscale Data Bus
nIN4
nIN3
nIN2
nIN1
Valid
Valid
L/H
L/H L/H L/H L/H
n = X, Y, Z
Note 3: L/H indicates VDD level or VSS level.
: When MD = High, GS = High, the grayscale data bus is set to 4-bit mode.
nIN0
L/H
L/H
11 2002-01-30
11 Page | ||
| Páginas | Total 22 Páginas | |
| PDF Descargar | [ Datasheet JBT6K47-AS.PDF ] | |
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