파트넘버.co.kr M81016KP 데이터시트 PDF


M81016KP 반도체 회로 부품 판매점

(M81016xP) OCTAL D-TYPE FLIP-FLOP DRIVER



Mitsubishi Electric 로고
Mitsubishi Electric
M81016KP 데이터시트, 핀배열, 회로
www.DataSheet4U.com
MITSUBISHI SEMICONDUCTOR <MOS-ARRAY>
M81016P/FP/KP
OCTAL D-TYPE FLIP-FLOP DRIVER WITH CLEAR
DESCRIPTION
M81016 is octal D-type flip-flop driver by 20-pin package. It
has 8 same circuit units which is composed of D-type flip-flop
logic circuit and high voltage NchMOS output transistor.
M81016 has a common direct clear input and a common
clock input.
FEATURES
q Lineup with three packages
q High breakdown voltage (BVDSX 40V)
q Drain output current (IDS(max) = 200mA)
q With input protection diodes
q Pin assignment of input-output flow through
q Wide operating temperature range (Ta = –40 to +85°C)
APPLICATION
LED drive
PIN CONFIGURATION (TOP VIEW)
INPUT
CLR 1
D1 2
D2 3
D3 4
D4 5
D5 6
D6 7
D7 8
D8 9
CLK 10
20 VDD
19 Y1
18 Y2
17 Y3
16 Y4
OUTPUT
15 Y5
14 Y6
13 Y7
12 Y8
11 GND
Package type 20P4B(P)
20P2N-A(FP)
20P2E-A(KP)
FUNCTION
The common direct clear input and common clock input are
connected to every circuit unit by the same way. Signal at the
D inputs is transferred to Y outputs by D-type flip-flops on the
positive-going edge of the clock pulse.
If CLR is set to “L”, outputs Y1-Y8 will be altogether set to “H”
regardless of D1-D8 and CLK.
The maximum drain current of an output is 200mA. The
maximum between drain-source is 40V.
Moreover, M81016FP/KP can save space with mini-flat
package.
LOGIC DIAGRAM (POSITIVE LOGIC)
CLK 10
CLR 1
Y1
19
DQ
CK
R
Y2
18
DQ
CK
R
Y3
17
DQ
CK
R
Y4
16
DQ
CK
R
Y5
15
DQ
CK
R
Y6
14
DQ
CK
R
Y7
13
DQ
CK
R
Y8
12
20 VDD
DQ
CK
R
23456789
D1 D2 D3 D4 D5 D6 D7 D8
11 GND
Oct.2004


M81016KP 데이터시트, 핀배열, 회로
FUNCTION TABLE (EACH CHANNEL)
INPUT
CLR
L
CLK
X
H
H
HL
H
H : High level
L : Low level
X : Irrelevant
D
X
L
H
X
X
OUTPUT : Y
H
H
L
Latched
Latched
MITSUBISHI SEMICONDUCTOR <MOS-ARRAY>
M81016P/FP/KP
OCTAL D-TYPE FLIP-FLOP DRIVER WITH CLEAR
TIMING DIAGRAM
CLK
D
CLR
Y
5V
GND
5V
GND
5V
GND
VOH
VOL
ABSOLUTE MAXIMUM RATINGS (Unless otherwise noted, Ta = –40 ~ +85°C)
Symbol
VDD
VDS
VI
IDS
Parameter
Supply voltage
Drain-to-source voltage
Input voltage
Drain output current
Conditions
Output, H
Current per circuit output, L
Pd Power dissipation
Ta = 25°C,
when mounted on board
Topr Operating temperature
Tstg Storage temperature
M81016P
M81016FP
M81016KP
Ratings
7
0.5 ~ +40
0.5 ~ VDD
200
1.47
1.10
0.68
40 ~ +85
55 ~ +125
Unit
V
V
V
mA
W
°C
°C
RECOMMENDED OPERATING CONDITIONS (Unless otherwise noted, Ta = –40 ~ +85°C)
Symbol
Parameter
VDD Supply voltage
VDS Drain-to-source voltage
VIH Hinput voltage
VIL Linput voltage
P
Drain output current (Current per
IDS 1 circuit when 8 circuits are com- FP
ing on simultaneously)
KP
VIN Input voltage
tr,t f Rise time, Fall time, drain output
tsu Setup time before CLK
th Hold time, data after CLK
tw Pulse duration
f Clock frequency
Conditions
Duty Cycle no more than 45%
Duty Cycle no more than 100%
Duty Cycle no more than 34%
Duty Cycle no more than 100%
Duty Cycle no more than 18%
Duty Cycle no more than 100%
VDD = 4.5V
VDD = 4.5V
VDD = 4.5V
VDD = 4.5V
VDD = 4.5V
min
4.5
0
0.7VDD
0
0
0
0
0
0
0
0
0
20
5
40
Limits
typ
5.0
max
5.5
40
VDD
0.3VDD
200
135
200
120
200
95
VDD
500
20
Unit
V
V
V
V
mA
V
ns
ns
ns
ns
MHz
Oct.2004




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M81016KP driver

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(M81016xP) OCTAL D-TYPE FLIP-FLOP DRIVER - Mitsubishi Electric