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PDF 74FCT540 Data sheet ( Hoja de datos )
| Número de pieza | 74FCT540 | |
| Descripción | FAST CMOS OCTAL BUFFER/LINE DRIVER | |
| Fabricantes | Integrated Device | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de 74FCT540 (archivo pdf) en la parte inferior de esta página. Total 6 Páginas | ||
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IDT74FCT540AT/CT
FAST CMOS OCTAL BUFFER/LINE DRIVER
FAST CMOS OCTAL
BUFFER/LINE DRIVER
INDUSTRIALTEMPERATURERANGE
IDT74FCT540AT/CT
FEATURES:
− Low input and output leakage ≤1µ A (max.)
− CMOS power levels
− True TTL input and output compatibility
• VOH = 3.3V (typ.)
• VOL = 0.3V (typ.)
− Meets or exceeds JEDEC standard 18 specifications
− A and C speed grades
− High drive outputs (-15mA IOH, 64mA IOL)
− Power off disable outputs permit “live insertion”
− Available in SOIC, SSOP, and QSOP packages
DESCRIPTION:
The IDT octal buffer/line driver is built using an advanced dual metal
CMOS technology. The FCT540T is similar in function to the FCT240T,
except that the inputs and outputs are on opposite sides of the package. This
pinout arrangement makes these devices especially useful as output ports
for microprocessors and as backplane drivers, allowing ease of layout and
greater board density.
FUNCTIONAL BLOCK DIAGRAM
OEA
D0
D1
D2
D3
D4
D5
D6
D7
OEB
O0
O1
O2
O3
O4
O5
O6
O7
INDUSTRIAL TEMPERATURE RANGE
c 1999 Integrated Device Technology, Inc.
1
AUGUST 2000
DSC-5588/-
1 page  
IDT74FCT540AT/CT
FAST CMOS OCTAL BUFFER/LINE DRIVER
INDUSTRIALTEMPERATURERANGE
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
V CC
7.0V
Pulse
Generator
V IN
D.U.T.
RT
V OUT
50pF
CL
500Ω
500Ω
O ctal lin k
SWITCH POSITION
Test
Open Drain
Disable Low
Enable Low
All Other Tests
Switch
Closed
Open
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
8-link
SET-UP, HOLD, AND RELEASE TIMES
DATA
INPUT
TIMING
INPUT
tSU tH
ASYNCHRONOUS CONTROL
PRESET
tREM
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
tSU tH
ETC.
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
O ctal lin k
PULSE WIDTH
LO W -HIGH-LOW
PULSE
H IG H -L O W -H IG H
PULSE
1.5V
tW
1.5V
O ctal lin k
PROPAGATION DELAY
SAME PHASE
INPUT TRANSITION
OUTPUT
OPPOSITE PHASE
INPUT TRANSITION
tPLH
tPLH
tPHL
tPHL
3V
1.5V
0V
VOH
1.5V
VOL
3V
1.5V
0V
O ctal lin k
ENABLE AND DISABLE TIMES
ENABLE
CONTROL
INPUT
OUTPUT
NORMALLY
LOW
tPZL
S W IT C H
CLOSED
tPZH
OUTPUT
NORMALLY
HIGH
S W IT C H
OPEN
DISABLE
3V
1.5V
tPLZ
0V
3.5V
3.5V
1.5V
tPHZ
0.3V VOL
1.5V
0.3V VOH
0V 0V
O ctal lin k
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-
HIGH
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns
5
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet 74FCT540.PDF ] | |
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