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7LVC244APWDH 반도체 회로 부품 판매점

Octal buffer/line driver with 5-volt tolerant inputs/outputs 3-Statetitle



NXP Semiconductors 로고
NXP Semiconductors
7LVC244APWDH 데이터시트, 핀배열, 회로
INTEGRATED CIRCUITS
74LVC244A/74LVCH244A
Octal buffer/line driver with 5-volt tolerant
inputs/outputs (3-State)title
Product specification
Supersedes data of 1996 Sep 06
IC24 Data Handbook
1998 May 20
Philips
Semiconductors


7LVC244APWDH 데이터시트, 핀배열, 회로
Philips Semiconductors
Octal buffer/line driver with 5-volt
tolerant inputs/outputs (3-State)
Product specification
74LVC244A
74LVCH244A
FEATURES
5-volt tolerant inputs/outputs, for interfacing with 5-volt logic
Supply voltage range of 2.7V to 3.6V
Complies with JEDEC standard no. 8-1A
CMOS low power consumption
Direct interface with TTL levels
High impedance when VCC = 0V
Bushold on all data inputs (74LVCH244A only)
DESCRIPTION
The 74LVC244A/74LVCH244A is a high-performance, low-power,
low-voltage, Si-gate CMOS device, superior to most advanced
CMOS compatible TTL families.
Inputs can be driven from either 3.3V or 5V devices. In 3-State
operation, outputs can handle 5V. These features allow the use of
these devices as translators in a mixed 3.3V/5V environment.
The 74LVC244A/74LVCH244A is an octal non-inverting buffer/line
driver with 3-State outputs. The 3-State outputs are controlled by the
output enable inputs 1OE and 2OE. A HIGH on nOE causes the
outputs to assume a high impedance OFF-state. Schmitt-trigger
action at all inputs makes the circuit highly tolerant for slower input
rise and fall times.
The ’244’ is functionally identical to the ’240’, but the ’240’ has
non-inverting outputs.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
tPHL/tPLH
Propagation delay
1An to 1Yn;
2An to 2Yn
CL = 50pF
VCC = 3.3V
CI Input capacitance
CPD
Power dissipation capacitance per
buffer
Notes 1 and 2
NOTE:
1. CPD is used to determine the dynamic power dissipation (PD in mW):
PD = CPD x VCC2 x fi + S (CL x VCC2 x fo) where:
fi = input frequency in MHz; CL = output load capacity in pF;
fo = output frequency in MHz; VCC = supply voltage in V;
S (CL x VCC2 x fo) = sum of outputs.
2. The condition is VI = GND to VCC
ORDERING INFORMATION
PACKAGES
20-Pin Plastic Shrink Small Outline (SO)
20-Pin Plastic Shrink Small Outline (SSOP) Type II
20-Pin Plastic Thin Shrink Small Outline (TSSOP) Type I
20-Pin Plastic Shrink Small Outline (SO)
20-Pin Plastic Shrink Small Outline (SSOP) Type II
20-Pin Plastic Thin Shrink Small Outline (TSSOP) Type I
TEMPERATURE
OUTSIDE
RANGE
NORTH AMERICA
–40°C to +85°C 74LVC244A D
–40°C to +85°C 74LVC244A DB
–40°C to +85°C 74LVC244A PW
–40°C to +85°C 74LVCH244A D
–40°C to +85°C 74LVCH244A DB
–40°C to +85°C 74LVCH244A PW
TYPICAL
3.5
4.4
22.6
NORTH AMERICA
74LVC244A D
74LVC244A DB
7LVC244APW DH
74LVCH244A D
74LVCH244A DB
LVCH244APW DH
UNIT
ns
pF
pF
PKG. DWG. #
SOT163-1
SOT339-1
SOT360-1
SOT163-1
SOT339-1
SOT360-1
1998 May 20
2 853-1876 19419




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Octal buffer/line driver with 5-volt tolerant inputs/outputs 3-Statetitle - NXP Semiconductors