74LVTH16244 반도체 회로 부품 판매점
Low Voltage16-Bit Buffer/Line Driver with 3-STATE Outputs
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 Fairchild Semiconductor |
March 1999
Revised April 1999
74LVT16244 • 74LVTH16244
Low Voltage16-Bit Buffer/Line Driver
with 3-STATE Outputs
General Description
The LVT16244 and LVTH16244 contain sixteen non-invert-
ing buffers with 3-STATE outputs designed to be employed
as a memory and address driver, clock driver, or bus ori-
ented transmitter/receiver. The device is nibble controlled.
Individual 3-STATE control inputs can be shorted together
for 8-bit or 16-bit operation.
The LVTH16244 data inputs include bushold, eliminating
the need for external pull-up resistors to hold unused
inputs.
These buffers and line drivers are designed for low-voltage
(3.3V) VCC applications, but with the capability to provide a
TTL interface to a 5V environment. The LVT16244 and
LVTH16244 are fabricated with an advanced BiCMOS
technology to achieve high speed operation similar to 5V
ABT while maintaining a low power dissipation
Features
s Input and output interface capability to systems at 5V
VCC
s Bushold data inputs eliminate the need for external pull-
up resistors to hold unused inputs (74LVTH16244), also
available without bushold feature (74LVT16244).
s Live insertion/extraction permitted
s Power Up/Down high impedance provides glitch-free
bus loading
s Outputs source/sink −32 mA/+64 mA
s Functionally compatible with the 74 series 16244
s Latch-up performance exceeds 500 mA
Ordering Code:
Order Number
Package
Number
Package Description
74LVT16244MEA
MS48A
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300” Wide
74LVT16244MTD
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
74LVTH16244MEA
MS48A
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300” Wide
74LVTH16244MTD
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
© 1999 Fairchild Semiconductor Corporation DS500151
Print form created on April 12, 1999 2:43 pm
www.fairchildsemi.com
Connection Diagram
Functional Description
The LVT16244 and LVTH16244 contain sixteen non-invert-
ing buffers with 3-STATE outputs. The device is nibble (4
bits) controlled with each nibble functioning identically, but
independent of the other. The control pins can be shorted
together to obtain full 16-bit operation.
Logic Diagram
Pin Descriptions
Pin Names
OEn
I0–I15
O0–O15
Description
Output Enable Inputs (Active Low)
Inputs
Outputs
Truth Table
Inputs
OE1
I0–I3
LL
LH
HX
Inputs
OE2
I4–I7
LL
LH
HX
Inputs
OE3
I8–I11
LL
LH
HX
Inputs
OE4
L
L
H
H = High Voltage Level
L = Low Voltage Level
X = Immaterial
Z = High Impedance
I12–I15
L
H
X
Outputs
O0–O3
L
H
Z
Outputs
O4–O7
L
H
Z
Outputs
O8–O11
L
H
Z
Outputs
O12–O15
L
H
Z
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제조업체: Fairchild Semiconductor
( fairchild )
74LVTH16244 driver
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[ 74LVTH16244.PDF ]
[ 74LVTH16244 다른 제조사 검색 ]
국내 전력반도체 판매점
상호 : 아이지 인터내셔날
전화번호 : 051-319-2877
[ 홈페이지 ]
IGBT, TR 모듈, SCR, 다이오드모듈, 각종 전력 휴즈
( IYXS, Powerex, Toshiba, Fuji, Bussmann, Eaton )
전력반도체 문의 : 010-3582-2743
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