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74HCT4543 반도체 회로 부품 판매점

BCD to 7-segment latch/decoder/driver for LCDs



Philips 로고
Philips
74HCT4543 데이터시트, 핀배열, 회로
INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT4543
BCD to 7-segment
latch/decoder/driver for LCDs
Product specification
File under Integrated Circuits, IC06
December 1990


74HCT4543 데이터시트, 핀배열, 회로
Philips Semiconductors
BCD to 7-segment latch/decoder/driver
for LCDs
Product specification
74HC/HCT4543
FEATURES
Latch storage of BCD inputs
Blanking inputs
Output capability: non-standard
ICC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT4543 are high-speed Si-gate CMOS
devices and are pin compatible with “4543” of the “4000B”
series. They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT4543 are BCD to 7-segment
latch/decoder/drivers for liquid crystal displays. They have
four address inputs (D0 to D3), an active HIGH latch
disable input (LD), an active HIGH blanking input (BI), an
active HIGH phase input (PH) and seven buffered
segment outputs (Qa to Qg).
The “4543” provides the function of a 4-bit storage latch
and an 8-4-2-1 BCD to 7-segment decoder driver. The
“4543” can invert the logic levels of the output combination.
The phase (PH), blanking (BI) and latch disable (LD)
inputs are used to reverse the function table phase, blank
the display and store a BCD code, respectively.
For liquid crystal displays a square-wave is applied to PH
and the electrical common back-plane of the display. The
outputs of the “4543” are directly connected to the
segments of the liquid crystal.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns
SYMBOL
PARAMETER
CONDITIONS
tPHL/ tPLH
CI
CPD
propagation delay
Dn to Qn
LD to Qn
BI to Qn
input capacitance
power dissipation capacitance per package
CL = 15 pF; VCC = 5 V
notes 1 and 2
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW):
PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz
fo = output frequency in MHz
(CL × VCC2 × fo) = sum of outputs
CL = output load capacitance in pF
VCC = supply voltage in V
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC 1.5 V
TYPICAL
HC HCT
UNIT
29 33 ns
32 31 ns
20 28 ns
3.5 3.5 pF
42 42 pF
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information”.
December 1990
2




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