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Philips |
INTEGRATED CIRCUITS
DATA SHEET
74HC1G125; 74HCT1G125
Bus buffer/line driver; 3-state
Product specification
File under Integrated Circuits, IC06
1998 Nov 10
Philips Semiconductors
Bus buffer/line driver; 3-state
Product specification
74HC1G125; 74HCT1G125
FEATURES
• Wide operating voltage:
2.0 to 6.0 V
• Symmetrical output impedance
• High noise immunity
• Low power dissipation
• Balanced propagation delays
• Very small 5 pins package
• Output capability: bus driver.
DESCRIPTION
The 74HC1G/HCT1G125 is a
high-speed Si-gate CMOS device.
The 74HC1G/HCT1G125 provides
one non-inverting buffer/line driver
with 3-state output. The 3-state output
is controlled by the output enable
input (OE). A HIGH at OE causes the
output as assume a high-impedance
OFF-state.
The bus driver output currents are
equal compared to the
74HC/HCT125.
FUNCTION TABLE
See note 1.
INPUTS
OUTPUT
OE inA
LL
LH
HX
outY
L
H
Z
Note
1. H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
Z = high-impedance OFF state.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf ≤ 6.0 ns.
SYMBOL
PARAMETER
TYP.
CONDITIONS
UNIT
HC1G HCT1G
tPHL/tPLH
propagation delay CL = 15 pF;
inA to outY
VCC = 5 V
9
10 ns
CI input capacitance
1.5 1.5 pF
CPD power dissipation notes 1 and 2 30 27 pF
capacitance
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
∑ (CL × VCC2 × fo) = sum of outputs.
2. For HC1G the condition is VI = GND to VCC.
For HCT1G the condition is VI = GND to VCC − 1.5 V.
PINNING
PIN
1
2
3
4
5
SYMBOL
OE
inA
GND
outY
VCC
DESCRIPTION
output enable input
data input
ground (0 V)
data output
DC supply voltage
1998 Nov 10
2
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