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PDF 74ACQ241 Data sheet ( Hoja de datos )
| Número de pieza | 74ACQ241 | |
| Descripción | Octal Buffer/Line Driver with 3-STATE Outputs | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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January 1990
Revised September 1998
74ACQ241
Octal Buffer/Line Driver with 3-STATE Outputs
General Description
The ACQ241 is an octal buffer and line driver designed to
be employed as a memory address driver, clock driver and
bus oriented transmitter or receiver which provides
improved PC board density. The ACQ utilizes Fairchild
FACT Quiet Series™ technology to guarantee quiet output
switching and improved dynamic threshold performance.
FACT Quiet Series features GTO™ output control and
undershoot corrector in addition to a split ground bus for
superior performance.
Features
s ICC and IOZ reduced by 50%
s Guaranteed simultaneous switching noise level and
dynamic threshold performance
s Guaranteed pin-to-pin skew AC performance
s Improved latch-up immunity
s 3-STATE outputs drive bus lines or buffer memory
address registers
s Outputs source/sink 24 mA
s Faster prop delays than the standard AC
Ordering Code:
Order Number Package Number
Package Description
74ACQ241SC
M20B
20-Lead Small Outline Integrated Circuit, JEDEC MS-013, 0.300” Wide Body
74ACQ241PC
N20A
20-Lead Plastic Dual-In-Line Package, JEDEC MS-001, 0.300” Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
www.DataSPheient4U.cDomescriptions
IEEE/IEC
Pin Names
Description
OE1, OE2
I0–I7
O0–O7
3-STATE Output Enable Inputs
Inputs
Outputs
Truth Tables
Connection Diagram
Pin Assignment for DIP and SOIC
Inputs
OE1
In
LL
LH
HX
Outputs
(Pins 12, 14, 16, 18)
L
H
Z
Inputs
Outputs
OE2
In
(Pins 3, 5, 7, 9)
HL
L
HH
H
HX
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
Z
FACT™, FACT Quiet Series™, and GTO™ are trademarks of Fairchild Semiconductor Corporation.
© 1998 Fairchild Semiconductor Corporation DS010642.prf
www.fairchildsemi.com
1 page  
FACT Noise Characteristics
The setup of a noise characteristics measurement is critical
to the accuracy and repeatability of the tests. The following
is a brief description of the setup used to measure the
noise characteristics of FACT.
Equipment:
Hewlett Packard Model 8180A Word Generator
PC-163A Test Fixture
Tektronics Model 7854 Oscilloscope
Procedure:
1. Verify Test Fixture Loading: Standard Load 50 pF,
500Ω.
2. Deskew the HFS generator so that no two channels
have greater than 150 ps skew between them. This
requires that the oscilloscope be deskewed first. It is
important to deskew the HFS generator channels
before testing. This will ensure that the outputs switch
simultaneously.
3. Terminate all inputs and outputs to ensure proper load-
ing of the outputs and that the input levels are at the
correct voltage.
4. Set the HFS generator to toggle all but one output at a
frequency of 1 MHz. Greater frequencies will increase
DUT heating and effect the results of the measure-
ment.
5. Set the word generator input levels at 0V LOW and 3V
HIGH for ACT devices and 0V LOW and 5V HIGH for
AC devices. Verify levels with an oscilloscope
VOLP/VOLV and VOHP/VOHV:
• Determine the quiet output pin that demonstrates the
greatest noise levels. The worst case pin will usually be
the furthest from the ground pin. Monitor the output volt-
ages using a 50Ω coaxial cable plugged into a standard
SMB type connector on the test fixture. Do not use an
active FET probe.
• Measure VOLP and VOLV on the quiet output during the
worst case transition for active and enable. Measure
VOHP and VOHV on the quiet output during the worst
case active and enable transition.
• Verify that the GND reference recorded on the oscillo-
scope has not drifted to ensure the accuracy and repeat-
ability of the measurements.
VILD and VIHD:
• Monitor one of the switching outputs using a 50Ω coaxial
cable plugged into a standard SMB type connector on
the test fixture. Do not use an active FET probe.
• First increase the input LOW voltage level, VIL, until the
output begins to oscillate or steps out a min of 2 ns.
Oscillation is defined as noise on the output LOW level
that exceeds VIL limits, or on output HIGH levels that
exceed VIH limits. The input LOW voltage level at which
oscillation occurs is defined as VILD.
• Next decrease the input HIGH voltage level, VIH, until
the output begins to oscillate or steps out a min of 2 ns.
Oscillation is defined as noise on the output LOW level
that exceeds VIL limits, or on output HIGH levels that
exceed VIH limits. The input HIGH voltage level at which
oscillation occurs is defined as VIHD.
• Verify that the GND reference recorded on the oscillo-
scope has not drifted to ensure the accuracy and repeat-
ability of the measurements.
FIGURE 1. Quiet Output Noise Voltage Waveforms
Note 10: VOHV and VOLP are measured with respect to ground reference.
Note 11: Input pulses have the following characteristics: f = 1 MHz, tr =
3 ns, tf = 3 ns, skew < 150 ps.
FIGURE 2. Simultaneous Switching Test Circuit
5 www.fairchildsemi.com
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| PDF Descargar | [ Datasheet 74ACQ241.PDF ] | |
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