74ALVC162827 반도체 회로 부품 판매점
Low Voltage 20-Bit Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs and 26 Series Resistors in the Outputs
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 Fairchild Semiconductor |
November 2001
Revised November 2001
74ALVC162827
Low Voltage 20-Bit Buffer/Line Driver
with 3.6V Tolerant Inputs and Outputs
and 26Ω Series Resistors in the Outputs
General Description
The ALVC162827 contains twenty non-inverting buffers
with 3-STATE outputs to be employed as a memory and
address driver, clock driver, or bus oriented transmitter/
receiver. The device is byte controlled. Each byte has NOR
output enables for maximum control flexibility.
The 74ALVC162827 is designed for low voltage (1.65V to
3.6V) VCC applications with I/O capability up to 3.6V. The
ALVC162827 is also designed with 26Ω resistors in the
outputs.
The 74ALVC162827 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
s 1.65V to 3.6V VCC supply operation
s 3.6V tolerant inputs and outputs
s 26Ω series resistors in outputs
s tPD
3.9 ns max for 3.0V to 3.6V VCC
4.6 ns max for 2.3V to 2.7V VCC
8.2 ns max for 1.65V to 1.95V VCC
s Power-off high impedance inputs and outputs
s Supports live insertion and withdrawal (Note 1)
s Uses patented noise/EMI reduction circuitry
s Latchup conforms to JEDEC JED78
s ESD performance:
Human body model > 2000V
Machine model > 200V
Note 1: To ensure the high-impedance state during power up or power
down, OE should be tied to VCC through a pull-up resistor; the minimum
value of the resistor is determined by the current-sourcing capability of the
driver.
Ordering Code:
Order Number Package Number
Package Description
74ALVC162827T
MTD56
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix “X” to the ordering code.
Logic Symbol
Pin Descriptions
Pin Names
OEn
I0–I19
O0–O19
Description
Output Enable Input (Active LOW)
Inputs
Outputs
© 2001 Fairchild Semiconductor Corporation DS500698
www.fairchildsemi.com
Connection Diagram
Truth Tables
Inputs
Outputs
OE1
L
L
H
X
OE2
L
L
X
H
I0–I9
L
H
X
X
O0–O9
L
H
Z
Z
Inputs
Outputs
OE3
OE4
I0–I9
LL
L
LL
H
HX
X
XH
X
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial (HIGH or LOW, inputs may not float)
Z = High Impedance
O10–O19
L
H
Z
Z
Functional Description
The 74ALVC162827 contains twenty non-inverting buffers
with 3-STATE outputs. The device is byte controlled with
each byte functioning identically, but independent of each
other. The control pins may be shorted together to obtain
full 20-bit operation. The 3-STATE outputs are controlled by
Output Enable (OEn) inputs. When OE1, and OE2 are
LOW, O0–O10 are in the 2-state mode. When either OE1 or
OE2 are HIGH, the standard outputs are in the high imped-
ance mode but this does not interfere with entering new
data into the inputs. The same applies for byte two with
OE3 and OE4.
Logic Diagrams
www.fairchildsemi.com
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제조업체: Fairchild Semiconductor
( fairchild )
74ALVC162827 driver
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국내 전력반도체 판매점
상호 : 아이지 인터내셔날
전화번호 : 051-319-2877
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IGBT, TR 모듈, SCR, 다이오드모듈, 각종 전력 휴즈
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관련 데이터시트
74ALVC162827
Low Voltage 20-Bit Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs and 26 Series Resistors in the Outputs - Fairchild Semiconductor
74ALVC162827T
Low Voltage 20-Bit Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs and 26 Series Resistors in the Outputs - Fairchild Semiconductor