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NXP Semiconductors |
INTEGRATED CIRCUITS
DATA SHEET
74AHC2G125; 74AHCT2G125
Bus buffer/line driver; 3-state
Product specification
2004 Jan 13
Philips Semiconductors
Bus buffer/line driver; 3-state
Product specification
74AHC2G125; 74AHCT2G125
FEATURES
• Symmetrical output impedance
• High noise immunity
• ESD protection:
– HBM EIA/JESD22-A114-A exceeds 2000 V
– MM EIA/JESD22-A115-A exceeds 200 V
– CDM EIA/JESD22-C101 exceeds 1000 V.
• Low power dissipation
• Balanced propagation delays
• SOT505-2 and SOT765-1 package
• Specified from−40 to +85 °C and −40 to +125 °C.
DESCRIPTION
The 74AHC2G/AHCT2G125 is a high-speed Si-gate
CMOS device.
The 74AHC2G/AHCT2G125 provides a dual non-inverting
buffer/line driver with 3-state output. The 3-state output is
controlled by the output enable input (nOE). A HIGH at
pin nOE causes the output to assume a high-impedance
OFF-state.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf ≤ 3.0 ns.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
AHC2G AHCT2G
UNIT
tPHL/tPLH propagation delay nA to nY CL = 15 pF; VCC = 5 V
3.4 3.4 ns
CI input capacitance
1.5 1.5 pF
CPD power dissipation capacitance CL = 50 pF; f = 1 MHz; notes 1 and 2 9
11 pF
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts;
N = total load switching outputs;
∑(CL × VCC2 × fo) = sum of outputs.
2. The condition is VI = GND to VCC.
2004 Jan 13
2
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