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Fairchild Semiconductor |
May 1991
Revised November 1998
74ACTQ16240
16-Bit Inverting Buffer/Line Driver with 3-STATE Outputs
General Description
The ACTQ16240 contains sixteen inverting buffers with 3-
STATE outputs designed to be employed as a memory and
address driver, clock driver, or bus-oriented transmitter/
receiver. The device is nibble controlled. Each nibble has
separate 3-STATE control inputs which can be shorted
together for full 16-bit operation.
The ACTQ16240 utilizes Fairchild’s Quiet Series™ technol-
ogy to guarantee quiet output switching and improve
dynamic threshold performance. FACT Quiet Series™ fea-
tures GTO™ output control for superior performance.
Features
s Utilizes Fairchild’s FACT Quiet Series technology
s Guaranteed simultaneous switching noise level and
dynamic threshold performance
s Guaranteed pin-to-pin output skew
s Separate control logic for each byte
s 16-bit version of the ACTQ240
s Outputs source/sink 24 mA
s Additional specs for multiple output switching
s Output loading specs for both 50 pF and 250 pF loads
Ordering Code:
Order Number Package Number
Package Description
74ACTQ16240SSC
MS48A
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300” Wide
74ACTQ16240MTD
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
Pin Assignment
for SSOP and TSSOP
Pin Descriptions
Pin Names
OEn
I0–I15
O0–O15
Description
Output Enable Inputs (Active Low)
Inputs
Outputs
FACT™, FACT Quiet Series™, Quiet Series™, and GTO™ are trademarks of Fairchild Semiconductor Corporation.
© 1999 Fairchild Semiconductor Corporation DS010924.prf
www.fairchildsemi.com
Truth Tables
Inputs
OE1
I0–I3
LL
LH
HX
Inputs
OE2
I4–I7
LL
LH
HX
Inputs
OE3
I8–I11
LL
LH
HX
Inputs
OE4
I12–I15
LL
LH
H
H = High Voltage Level
L = Low Voltage Level
X = Immaterial
Z = High Impedance
X
Outputs
O0–O3
H
L
Z
Outputs
O4–O7
H
L
Z
Outputs
O8–O11
H
L
Z
Outputs
O12–O15
H
L
Z
Functional Description
The ACTQ16240 contains sixteen inverting buffers with 3-
STATE standard outputs. The device is nibble (4 bits) con-
trolled with each nibble functioning identically, but indepen-
dently of the other. The control pins may be shorted
together to obtain full 16-bit operation. The 3-STATE out-
puts are controlled by an Output Enable (OEn) input for
each nibble. When OEn is LOW, the outputs are in 2-state
mode. When OEn is HIGH, the outputs are in the high
impedance mode, but this does not interfere with entering
new data into the inputs.
Logic Diagram
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