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National Semiconductor |
July 1998
54ABT16244
16-Bit Buffer/Line Driver with TRI-STATE® Outputs
General Description
The ’ABT16244 contains sixteen non-inverting buffers with
TRI-STATE outputs designed to be employed as a memory
and address driver, clock driver, or bus oriented transmitter/
receiver. The device is nibble controlled. Individual
TRI-STATE control inputs can be shorted together for 8-bit or
16-bit operation.
Features
n Separate control logic for each nibble
n 16-bit version of the ’ABT244
n Outputs sink capability of 48 mA, source capability of
24 mA
n Guaranteed output skew
n Guaranteed multiple output switching specifications
n Output switching specified for both 50 pF and 250 pF
loads
n Guaranteed simultaneous switching noise level and
dynamic threshold performance
n Guaranteed latchup protection
n High impedance glitch free bus loading during entire
power up and power down cycle
n Non-destructive hot insertion capability
n Standard Microcircuit Drawing (SMD) 5962-9317402
Ordering Code:
Military
54ABT16244W-QML
Logic Symbol
Package
Number
WA48A
48-Lead Cerpack
Package Description
Connection Diagram
Pin Assignment for Cerpack
Pin Description
DS100223-1
Pin Names
OEn
I0– I15
O0– O15
Description
Output Enable Inputs (Active Low)
Inputs
Outputs
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
© 1998 National Semiconductor Corporation DS100223
DS100223-2
www.national.com
Functional Description
The ’ABT16244 contains sixteen non-inverting buffers with TRI-STATE outputs. The device is nibble (4 bits) controlled with each
nibble functioning identically, but independent of the other. The control pins can be shorted together to obtain full 16-bit operation.
Truth Tables
Inputs
Outputs
OE1
L
L
Inputs
I0– I3
L
H
Outputs
O0– O3
L
H
OE2
L
L
H
I4– I7
L
H
X
O4– O7
L
H
Z
HX
Z
Inputs
Outputs
OE3
L
L
Inputs
I8– I11
L
H
Outputs
O8– O11
L
H
OE4
L
L
H
I12– I15
L
H
X
O12– O15
L
H
Z
HX
Z
H = High Voltage Level
L = Low Voltage Level
X = Immaterial
Z = High Impedance
Logic Diagram
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DS100223-3
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