파트넘버.co.kr 3967 데이터시트 PDF


3967 반도체 회로 부품 판매점

MICROSTEPPING DRIVER WITH TRANSLATOR



Allegro MicroSystems 로고
Allegro MicroSystems
3967 데이터시트, 핀배열, 회로
3967
MICROSTEPPING DRIVER WITH TRANSLATOR
REF 1
RC2 2
÷8
PWM
TIMER
24 PFD
23 RC1
SLEEP 3
22 RESET
OUT2B 4
LOAD
SUPPLY2
5 VBB2
GND 6
21 OUT1B
LOAD
VBB1 20 SUPPLY1
19 GND
GND 7
18 GND
SENSE2 8
17 SENSE1
OUT2A 9
16 OUT1A
STEP 10
DIR 11
MS1 12
TRANSLATOR
15 ENABLE
& CONTROL
LOGIC
VCC
14
LOGIC
SUPPLY
13 MS2
Dwg. PP-075-2
ABSOLUTE MAXIMUM RATINGS
at TA = +25°C
Load Supply Voltage, VBB ............. 30 V
Output Current, IOUT
Continuous ..................... ±750 mA*
Peak ................................. ±850 mA
Logic Supply Voltage, VCC ........... 7.0 V
Logic Input Voltage Range, VIN
(tw >30 ns) ............. -0.3 V to +7.0 V
(tw <30 ns) ................ -1 V to +7.0 V
Sense Voltage, VSENSE ............... 0.68 V
Reference Voltage, VREF ................ VCC
Package Power Dissipation,
PD ................................. See page 8
Operating Temperature Range,
TA ........................... -20°C to +85°C
Junction Temperature, TJ ......... +150°C
Storage Temperature Range,
TS ......................... -55°C to +150°C
* Output current rating may be limited by
duty cycle, ambient temperature, and heat
sinking. Under any set of conditions, do not
exceed the specified current rating or a
junction temperature of 150°C.
The A3967SLB is a complete microstepping motor driver with
built-in translator. It is designed to operate bipolar stepper motors in
full-, half-, quarter-, and eighth-step modes, with output drive capabil-
ity of 30 V and ±750 mA. The A3967SLB includes a fixed off-time
current regulator that has the ability to operate in slow, fast, or mixed
current-decay modes. This current-decay control scheme results in
reduced audible motor noise, increased step accuracy, and reduced
power dissipation.
The translator is the key to the easy implementation of the
A3967SLB. By simply inputting one pulse on the STEP input the
motor will take one step (full, half, quarter, or eighth depending on two
logic inputs). There are no phase-sequence tables, high-frequency
control lines, or complex interfaces to program. The A3967SLB
interface is an ideal fit for applications where a complex µP is unavail-
able or over-burdened.
Internal circuit protection includes thermal shutdown with hyster-
esis, under-voltage lockout (UVLO) and crossover-current protection.
Special power-up sequencing is not required.
The A3967SLB is supplied in a 24-pin SOIC with four internally
fused pins for enhanced thermal dissipation. The pins are at ground
potential and need no insulation. A lead (Pb) free (100% matte tin
leadframe) version is also available.
FEATURES
±750 mA, 30 V Output Rating
Satlington® Sink Drivers
Automatic Current-Decay Mode Detection/Selection
3.0 V to 5.5 V Logic Supply Voltage Range
Mixed, Fast, and Slow Current-Decay Modes
Internal UVLO and Thermal Shutdown Circuitry
Crossover-Current Protection
Part Number Pb-free* Package
Packing
A3967SLB-T
Yes 24-Lead SOIC 31 per tube
A3967SLBTR-T Yes 24-Lead SOIC 1000 per reel
*Pb-based variants are being phased out of the product line. The variants cited in this
footnote are in production but have been determined to be LAST TIME BUY. This
classification indicates that sale of this device is currently restricted to existing
customer applications. The variants should not be purchased for new design
applications because obsolescence in the near future is probable. Samples are no
longer available. Status change: October 31, 2006. Deadline for receipt fo LAST TIME
BUY orders: April 27, 2007. These variants include: A3967SLB and A3967SLBTR.


3967 데이터시트, 핀배열, 회로
3967
MICROSTEPPING DRIVER
WITH TRANSLATOR
FUNCTIONAL BLOCK DIAGRAM
LOGIC
SUPPLY
VCC
14
REF.
SUPPLY
REF
1
RC1
23
STEP 10
DIR 11
RESET 22
MS1 12
MS2 13
UVLO
AND
FAULT
DETECT
÷8 DAC
+-
SENSE
PWM LATCH
BLANKING
MIXED DECAY
3 PWM TIMER
SLEEP 3
ENABLE 15
VPF
24
PFD
2
RC2
PWM TIMER
3 PWM LATCH
BLANKING
MIXED DECAY
DAC
+-
67
18 19
VBB1
20
LOAD
SUPPLY
OUT1A
16
OUT1B
21
SENSE1
17
5
VBB2
OUT2A
9
OUT2B
4
SENSE2
8
Dwg. FP-050-3A
Table 1. Microstep Resolution Truth Table
MS1 MS2 Resolution
L L Full step (2 phase)
H L Half step
L H Quarter step
H H Eighth step
2
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
Copyright © 2002, 2003 Allegro MicroSystems, Inc.




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3967 driver

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