파트넘버.co.kr 100310 데이터시트 PDF


100310 반도체 회로 부품 판매점

Low Skew 2:8 Differential Clock Driver



Fairchild Semiconductor 로고
Fairchild Semiconductor
100310 데이터시트, 핀배열, 회로
October 1991
Revised November 1999
100310
Low Skew 2:8 Differential Clock Driver
General Description
The 100310 is a low skew 8-bit differential clock driver
which is designed to select between two separate differen-
tial clock inputs. The low output to output skew (< 50 ps) is
maintained for either clock input. A LOW on the select pin
(SEL) selects CLKINA, CLKINA and a HIGH on the SEL
pin selects the CLKINB, CLKINB inputs.
The 100310 is ideal for those applications that need the
ability to freely select between two clocks, or to maintain
the ability to switch to an alternate or backup clock should a
problem arise with the primary clock source.
A VBB output is provided for single-ended operation.
Features
s Low output to output skew
s Differential inputs and outputs
s Allows multiplexing between two clock inputs
s Voltage compensated operating range: 4.2V to 5.7V
s Available to industrial grade temperature range
(PLCC package only)
Ordering Code:
Order Number Package Number
Package Description
100310QC
V28A
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
100310QI
V28A
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
Industrial Temperature Range (40°C to +85°C)
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
28-Pin PLCC
Pin Descriptions
Pin Names
CLKINn, CLKINn
SEL
CLK07, CLK08
VBB
NC
Description
Differential Clock Inputs
Select
Differential Clock Outputs
VBB Output
No Connect
Truth Table
CLKINA CLKINA CLKINB CLKINB SEL CLKn CLKn
H L X X LH L
L H X X LL H
X X H L HH L
X X L H HL H
© 1999 Fairchild Semiconductor Corporation DS010943
www.fairchildsemi.com


100310 데이터시트, 핀배열, 회로
Absolute Maximum Ratings(Note 1)
Storage Temperature (TSTG)
Maximum Junction Temperature (TJ)
Pin Potential to Ground Pin (VEE)
Input Voltage (DC)
Output Current (DC Output HIGH)
ESD (Note 2)
65°C to +150°C
+150°C
7.0V to +0.5V
VEE to +0.5V
50 mA
2000V
Commercial Version
Recommended Operating
Conditions
Case Temperature (TC)
Commercial
0°C to +85°C
Industrial
40°C to +85°C
Supply Voltage (VEE)
5.7V to 4.2V
Note 1: The Absolute Maximum Ratingsare those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The Recommended Operating Conditionstable will define the conditions
for actual device operation.
Note 2: ESD testing conforms to MIL-STD-883, Method 3015.
DC Electrical Characteristics (Note 3)
VEE = −4.2V to 5.7V, VCC = VCCA = GND, TC = 0°C to +85°C
Symbol
Parameter
Min Typ
Max Units
Conditions
VOH Output HIGH Voltage
1025
955
870
mV VIN = VIH (Max)
Loading with
VOL Output LOW Voltage
1830
1705
1620
mV or VIL (Min)
50to 2.0V
VOHC
Output HIGH Voltage
1035
mV VIN = VIH
Loading with
VOLC
Output LOW Voltage
1610
mV or VIL (Max)
50to 2.0V
VBB Output Reference Voltage
1380
1320
1260
mV IVBB = −250 µA
VDIFF
Input Voltage Differential
150
mV Required for Full Output Swing
VCM Common Mode Voltage
VCC 2.0
VCC 0.5
V
VIH Input HIGH Voltage
1165
870
mV Guaranteed HIGH Signal for All Inputs
VIL Input LOW Voltage
1830
1475
mV Guaranteed LOW Signal for All Inputs
IIL Input LOW Current
0.50
µA VIN = VIL (Min)
IIH Input HIGH Current
240 µA VIN = VIH (Max)
ICBO
Input Leakage Current
10
µA VIN = VEE
IEE Power Supply Current
100
40 mA Inputs Open
Note 3: The specified limits represent the worst casevalue for the parameter. Since these values normally occur at the temperature extremes, additional
noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are cho-
sen to guarantee operation under worst caseconditions.
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