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TriQuint Semiconductor |
Advance Product Datasheet
June 10, 2003
9.9-11.2Gb/s Optical Modulator Driver
TGA4953-EPU
OC-192 Metro and Long Haul Applications
Surface Mount Package
Key Features and Performance
• Metro MSA Compatible
• Wide Drive Range (3V to 10V)
• Single-ended Input / Output
• Low Power Dissipation (1W at Vo=6V)
• Very Low Rail Ripple
• 25 ps Edge Rates (20/80)
• Small Form Factor
- 11.4 x 8.9 x 2 mm
- 0.450 x 0.350 x 0.080 inches
• Evaluation Board Available.
Description
The TriQuint TGA4953-EPU is part of a series of surface
mount modulator drivers suitable for a variety of driver
applications and is compatible with Metro MSA standards.
The 4953 consists of two high performance wideband
amplifiers combined with off chip circuitry assembled in a
surface mount package. A single 4953 placed between
the MUX and Optical Modulator provides OEMs with a
board level modulator driver surface mount solution.
The 4953 provides Metro and Long Haul designers with
system critical features such as: low power dissipation
(1.1 W at Vo=6 V), very low rail ripple, high voltage drive
capability at 5V bias (6 V amplitude adjustable to 3 V), low
output jitter (10 ps typical), and low input drive sensitivity
(250 mV at Vo=6 V).
Primary Applications
• Mach-Zehnder Modulator Driver for
Metro and Long Haul.
Measured Performance
TGA4953 Evaluation Board (Metro MSA Conditions)
10.7 Gb/s, Vplus=5 V, Id=210 mA, (Pdc=1.1 Watt)
Vout=6 Vpp, CPC=50%, Vin = 500 mVpp
Scale: 2 V/div, 15 ps/div
The 4953 requires external DC blocks, a low frequency
choke, and control circuitry.
The TGA4953-EPU is available on an evaluation board.
Note: Devices designated as EPU are typically early in their characterization process prior to finalizing all electrical and process
specifications. Specifications are subject to change without notice.
TriQuint Semiconductor Texas : (972)994 8465 Fax (972)994 8504 Web: www.triquint.com
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Advance Product Datasheet
TGA4953EPU
MAXIMUM RATINGS
SYMBOL
Vd1, Vd2T
PARAMETER 6/
POSITIVE SUPPLY VOLTAGE
Drain Voltage
VALUE
8V
POSITIVE SUPPLY CURRENT
Id1 Drain Current
Id2T Drain Current
Pd POWER DISSIPATION
NEGATIVE GATE
Vg1, Vg2
Voltage
Ig1, Ig2
Gate Current
CONTROL GATE
Vctrl1, Vctrl2 Voltage
Ictrl1, Ictrl2 Gate Current
RF INPUT
PIN Sinusoidal Continuous Wave Power
VIN 10.7Gb/s PRBS Input Voltage Peak to Peak
TCH OPERATING CHANNEL TEMPERATURE
TSTG STORAGE TEMPERATURE
100 mA
300mA
4W
0 V to –3 V
5 mA
Vd/2 to –3 V
5 mA
23 dBm
4 Vpp
150 0C
-40 to 125 0C
NOTES
1/
2/
3/
4/ 5/
Notes:
1/ Assure the combination of Vd and Id does not exceed maximum power dissipation rating.
2/ When operated at this bias condition with a base plate temperature of 800C, the median life is reduced.
3/ Assure Vctl1 never exceeds Vd1 and assure Vctrl2 never exceeds Vd2 during bias up and down sequences.
4/ These ratings apply to each individual FET.
5/ Junction operating temperature will directly affect the device median time to failure (MTTF). For maximum
life, it is recommended that junction temperatures be maintained at the lowest possible levels.
6/ These ratings represent the maximum operable values for the device.
Note: Devices designated as EPU are typically early in their characterization process prior to finalizing all electrical and process
specifications. Specifications are subject to change without notice.
TriQuint Semiconductor Texas : (972)994 8465 Fax (972)994 8504 Web: www.triquint.com
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